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王子硕 <zishuowang93@...>

  I am a student from China. I am working on a project with RISC-V ISA recently. And I have noticed that zephyr has had a support for RISC-V since its release 1.7. But I have some questions here need your help. 
  Does zephyr support multi-core on RISC-V ISA? 
  How many boards does zephyr support on RISC-V? 
  How can I use zephyr if I have a multi-core RISC-V implementation?

  I have read the document on website, but doesn't find the answers. Could you help me to solve these questions? Thanks very much && looking forwarding for your email.