Hi Maciek,

I've done a PoC port of Zephyr to STM32F103VE MCU on a EB-STM_06 dev
board. The port is rather minimal, most of the configuration is
hardcoded. The MCU is configured to use internal HSI clock source, with
PLL feeding a 36MHz clock to SYSCLK and AHB/APB (tried to make it board
agnostic). The minimal UART driver assumes that USART1 will be used with
a fixed speed of 9600kbps. The the best of my knowledge, this should be
enough as a starting point for porting to other boards.

The source code lives here:
https://github.com/bboozzoo/zephyr/tree/bboozzoo/stm32f103 in
bboozzoo/stm32f103 branch.

Obligatory video: https://goo.gl/photos/AGhfXYvv8CswjRRu7 (sorry for the
background sound and overall potato quality). In the vide I flash the
firmware through STLink, the board resets and starts the hello world
sample. The output is received via a USB RS232 adapter. The sample
program has been also modified to print an increasing loop counter, just
to make sure we're not looping the same content.

If anyone feels like this is worth working on I might be able to try and
clean it up a little bit and push out to Gerrit (once I get my access
issues resolved). I also have a couple of boards with STM32F3xx and
STM32L4xx MCUs so I might give these a try, unfortunately all of these
are Cortex-M4 based.

Very cool!

Cortex-M4 should work as well, since the M4 is a superset of the M3. The
first board we supported is the Freescale FRDM-K64F, which is an M4.

Has anyone looked at ports to Cortex-M0?

For M0, you have to do an arch port as well. The M3 arch port was done
by using a couple of features that are not available on M0, basically
BASEPRI for interrupt locking instead of PRIMASK and some Thumb2
instructions that are not available on M0.

That said, it might not be too hard to make the M3 arch M0-capable, we
just haven't had the time to look very deep into it.

Cheers,
Ben

--
Benjamin Walsh, SMTS
Wind River Rocket
Zephyr kernel maintainer
zephyrproject.org
www.windriver.com