On Wed, Mar 9, 2016 at 6:54 PM, Nashif, Anas <anas.nashif(a)intel.com> wrote:
On 9 Mar 2016, at 09:48, Maciek Borzecki <maciek.borzecki(a)gmail.com> wrote:Maybe I was misunderstood in my email about the structure. I was suggesting to move the SoCs directly under soc/ and ski[ the st_stm32 level. If we are to do things the same way across architecture we would need to group all quarks under intel_quark.
I've pushed another set of updates. Hopefully I have not missed any
comments that were added to the previous versions.
I took the liberty of rebasing Daniel's patch on top of current
master, and so rebasing all of my patches on top of this one.
There are 2 major changes since the previous version.
One is extending of pinmux integration for STM32F1. That includes
structures that define alternate functions for IO pins plus some
helpers for selecting pin's function in a more convenient fashion.
The second change is adding UART_1 and UART_2 ports that map to USART2
and USART3 respectively.
Hopefully it'll be possible to merge at least some of these patches to
https://gerrit.zephyrproject.org/r/645 st_stm32/stm32f1: introduce
STM32F1x SoC family
Also, the st_ prefix is probably being used because we have ti_ and fsl_ for some of the existing SOCs. Maybe it is the right time now to drop the vendor part completely. (unrelated to this change, but we need to fix this with existing SOCs under arch/arm)
As more SOCs and boards are being added it is important to keep things consistent. The current structure allows adding a new SOC or board by just adding the files and structure and without changing any other files, we should keep it this way.
Summing up, what you're basically suggesting is having a structure
like this (assumig that we keep vendor prefix for the time being):
If we're on the same page then i"ll post some patches tomorrow. Seems
like an easy fix.