Jon Medhurst (Tixy) <tixy@...>
On Tue, 2016-09-06 at 16:03 +0000, Boie, Andrew P wrote:
What I did for Nios II (which is a soft-CPU that runs on Altera FPGAs)Well, they are all ARM at least :-). Some v7 some v8 architecture, some
single core, some multi core, some with caches, memory and security
protection areas. Some with DMA.
From looking at the nios stuff, it seems there is a separate board and
soc for each combinations, so in my case 20 socs and 20 boards. :-(
Perhaps I'll end up with some custom makefiles and scripts to generate
all these from some kind of meta config. Though possibly it might be as
simple as one board, one SoC and multiple defconfigs (but zephyr top
level scripts seem to assume one board == one defconfig ??).
For now, I hacked up a couple of board directories and a soc directory
just so I can write and test device drivers, but I'm aware I'll need to
dealing with this properly at some point.
As a slight tangent, I'm also doing other things in 'non-standard'
Zephyr ways for things like drivers, because I can't bring myself to
cut'n'paste Kconfig and code segments to support multiple instances of
drivers (most boards have 5 UARTs and 5 SPI devices).
HTH,Not sure it did, but thanks for reply. :-)