Re: Reg: Transfer mode & 9 bit mode in QMSI SPI driver


Liu, Baohong
 

Hi Tomasz and all,

I guess that the SPI controller in quark may be able to support this. Here is what you need to do.


1. Set spi frame size to 9.

2. Connect the three pins (CS, SCLK,MOSI) to the LCD slave.

3. Combine A0 and the 8-bit data into one 32-bit word (A0 is the 8th bit, D0 to D7 is the 0th to 7th bits, and all the other bits are 0s), and send it to tx fifo.

4. You should be able to see the thing on LCD.

We do not need a 3-wire SPI controller. We just do not use one of the pins which is MISO.

Thanks
Baohong

From: Tomasz Bursztyka [mailto:tomasz.bursztyka(a)linux.intel.com]
Sent: Thursday, October 13, 2016 7:42 AM
To: devel(a)lists.zephyrproject.org
Cc: cjordan(a)synopsys.com
Subject: [devel] Re: Reg: Transfer mode & 9 bit mode in QMSI SPI driver

Hi,

I am not aware of DW SPI controller supporting 3-wire configuration.

@Chuck?

Tomasz
Hi

Please help me on the following

We are using Atlas peak and connected LCD in the SPI interface.
The LCD manufacturer preferred to use only 3 wire SPI ( SCLK, SPI_CS, MOSI) along with 9 bit clock
Screenshot of the clock signals of LCD attached


1. We need to give transfer mode of SPI as transmit only . can we directly add cfg->transfer_mode = QM_SPI_TMOD_TX in spi_qmsi.c

2. In order to support 9 bit SPI clock what needs to be added in .config of spi_configure ?

Thanks

Best regards

Mahendravarman Rajarao
RBEI/EAA

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