Re: Reg: Transfer mode & 9 bit mode in QMSI SPI driver

Chuck Jordan <Chuck.Jordan@...>

Hi Tomasz,
I have some experience working with the OLEDrgb using SPI. I haven't tried LCD displays.
In terms of spi_config, I'm using:

But you really need to study the SPECs for the LCD display with respect to how CPOL and CPHA are to be configured.
The frequency can depend on your CPU's frequency too. If your CPU is clocking slow, you probably have to be more modest with your SPI frequency.
So you have to experiment a little to see how fast you can drive SPI, relative to the CPU's ability to handle it.

Another thing to look out for is SPI input interrupts. For a display device, that only requires you to transmit data to it, you want to make sure that a non-connected RX line doesn't produce spurious interrupts on SPI. Either terminate it, or make sure the device driver is configured to MASK such interrupts. Many devices don't bother terminating this line - so beware.

In my case there are also some GPIO lines hooked up to the OLED so that I can do things like send a pulse to RESET the display. Very handy.
Some displays can get STUCK, and w/o reset line, software has no ability to get it UNSTUCK. So this is another design consideration.


From: Tomasz Bursztyka [mailto:tomasz.bursztyka(a)]
Sent: Thursday, October 13, 2016 7:42 AM
To: devel(a)
Cc: Chuck.Jordan(a)
Subject: Re: [devel] Reg: Transfer mode & 9 bit mode in QMSI SPI driver


I am not aware of DW SPI controller supporting 3-wire configuration.



Please help me on the following

We are using Atlas peak and connected LCD in the SPI interface.
The LCD manufacturer preferred to use only 3 wire SPI ( SCLK, SPI_CS, MOSI) along with 9 bit clock
Screenshot of the clock signals of LCD attached

1. We need to give transfer mode of SPI as transmit only . can we directly add cfg->transfer_mode = QM_SPI_TMOD_TX in spi_qmsi.c

2. In order to support 9 bit SPI clock what needs to be added in .config of spi_configure ?


Best regards

Mahendravarman Rajarao

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