-----Original Message-----

From: Liu, Baohong [mailto:baohong.liu(a)intel.com]
Sent: Tuesday, January 17, 2017 4:52 PM


Hi everyone,

Based on the feedbacks, I updated the RFC.

[...]

/**
* @brief DMA channel configuration structure.
*
* config is a bit field with the following parts:
* dma_slot [ 0 : 5 ] --which peripheral and direction(HW
specific)
* hankshake_polarity [ 6 ] --high or low
* channel_direction [ 7 : 9 ] --0-memory to memory, 1-memory to
peripheral,
* 2-peripheral to memory ...
* complete_int_en [ 10 ] --completion interrupt enable
* block_int_en [ 11 ] --block completion interrupt enable
* source_int_en [ 12 ] --source completion interrupt enable
* dest_int_en [ 13 ] --destination completion interrupt
enable
* error_int_en [ 14 ] --error interrupt enable
* source_handshake [ 15 ] --HW or SW
* dest_handshake [ 16 ] --HW or SW

I thought the original idea (from ZEP-873) was to minimize the dma_channel_config
structure by removing SoC or driver specific entries like the handshake interface
above which may not be common in other DMA engines. IMO, those should be kept
inside the driver and not to be exposed in API.

Kuo