Re: ARMv7 Cortex-A port for Xilinx Zynq7000


Stephanos Ioannidis
 

Hi Immo,

 

Thanks for looking into this.

 

For the time being, I believe focusing on the following issues would help in getting these changes upstream-ed:

 

  1. Getting all applicable tests to pass
    1. At least, all applicable `kernel` tests must pass.
    2. Some tests (e.g. `benchmark` and `interrupt`) may require additional work to pass (see #22669 and #22670).
  2. Cleaning up commits (all the usual stuff)
    1. Breaking changes into more manageable chunks/commits
    2. Squashing commits that should really be one commit

 

The following are some ongoing issues that could be noteworthy:

 

  • Refactor ARM interrupt system (Cortex-A & Cortex-R) (#22718)
  • Implement benchmark tests for Cortex-R and Cortex-A (#22669)
  • Implement GIC-based ARM interrupt tests (#22670)
  • arch: arm: aarch32: Allow selecting compiler instruction set (#22741)
  • AArch64 / Cortex-A port improvements / TODO (#22411)
  • soc: arm64: Add support for Xilinx ZynqMP APU (#22418)

 

There is also the #arch-arm channel on the Slack where we discuss ARM arch development topics.

 

Regards,

 

Stephanos

 

From: devel@... <devel@...> On Behalf Of Immo Birnbaum via Lists.Zephyrproject.Org
Sent: Wednesday, February 26, 2020 9:55 PM
To: devel@...
Cc: devel@...
Subject: Re: [Zephyr-devel] ARMv7 Cortex-A port for Xilinx Zynq7000

 

Hi all,

here's my first update on the topic of the Zynq-7000 port, this is the progress so far:

- Set up a fresh development VM which now uses the Zephyr SDK, which works fine for the Cortex-A9.
- Forked the Zephyr repository and set up a feature branch, which can be found here: https://github.com/ibirnbaum/zephyr/tree/armv7_cortex_a
- Merged all of the changes/additions described above into the current code base.
- Updated the AXI GPIO driver to match the GPIO driver API which was heavily modified in the meantime.
- Kicked out my own GIC PL-390 interrupt controller driver and switched over to Stephanos Ionannidis' GICv1 implementation, including updated IRQ descriptors in the device tree files.
- I looked into the testsuite and ran tests on the QEMU Cortex-A9 target, plus a hand full of test cases on the actual hardware (as downloading the binary to the board is still a manual process using the Lauterbach TRACE software). The results don't look too bad, for example, these are the results of the 'kernel' test suite:
* 86 test configurations selected, 8 configurations discarded due to filters
* 24 tests skipped (e.g. SMP/ARMv8/userspace related test cases)
* Out of the 62 remaining test cases, 60 pass. One (kernel.timer.tickless) fails to build due to an unresolved symbol (z_clock_uptime). This is odd for two reasons: one, all other 'tickless'-related tests are skipped and two, the Local APIC timer driver seems to be the only timer driver implementing this function. To me, this looks more like a testsuite configuration issue? The other failure is the arch.interrupt test case, which actually runs but fails due to an assertion regarding the expected state of an IRQ to be tested. This is due to the target IRQ selection logic only being implemented for Cortex-M when it comes to the ARM architecture.
The following testsuites pass all test cases on the QEMU target which aren't filtered out for whatever reason (I didn't blacklist anything myself):
- lib
- misc
- portability
- posix
- shell
- subsys
- ztest
I'll have to look into the details as to why in some cases, more test cases are filtered out than executed. In some cases, e.g. ARMv8-specific stuff, it's pretty obvious, but in others I'm suspecting that I ought to whitelist testcases or subsystems for testing, likely in the target's YAML files? For example, despite having full Ethernet support, the 'net' testsuite in its current state does pretty much nothing.

I'll keep you updated and I'll look into the ongoing discussions and the mechanics of pull requests, I could start simple, as for example, the Xilinx TTC timer driver had a faulty prescaler calculation routine. As this source file is already in the main repository, this might be a good exercise for a pull request. Until then, I'd appreciate any feedback if anyone feels like experimenting with my fork of the repository.

Best regards,
Immo

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