Re: [RFC] SMP support for RISC-V privilege architecture


Kumar Gala
 

On Oct 6, 2020, at 4:04 AM, Katsuhiro Suzuki <katsuhiro@katsuster.net> wrote:

Hello All,

I'm working on SMP support for RISC-V privilege architecture.
https://github.com/katsuster/zephyr/tree/riscv_virt_pc_smp

It seems worked well on QEMU RV32 virt pc (*) porting.
(RV64 not tested yet)

But I don't understand Zephyr's SMP mechanism perfectly and
don't know required conditions (Ex. regression tests) if I
want to change these area.

I'm welcome comments or review of my patch.

(*)QEMU RV32 virt pc:
https://github.com/zephyrproject-rtos/zephyr/pull/28749

Diffs of config from default:
CONFIG_RISCV_USE_SWITCH=y (added by me)
CONFIG_SMP=y
CONFIG_MP_NUM_CPUS=4

Command line:
qemu-system-riscv32 -nographic -machine virt -net none \
-chardev stdio,id=con,mux=on -serial chardev:con \
-mon chardev=con,mode=readline -kernel zephyr/zephyr.elf \
-cpu rv32 -smp cpus=4 -bios none

Best Regards,
Katsuhiro Suzuki
Would probably be good to add a second SMP config for qemu_riscv32 for SMP=y. You can look at the boards/x86/qemu_x86 to see examples of having different configs.

As for testing, I’m guessing the main test to make sure runs and passes is tests/kernel/smp.

Andrew, can probably mention other tests or aspects to be aware of.

- k

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