Re: SMP support for RISC-V privilege architecture

Katsuhiro Suzuki

Hi Andrew,

On 2020/10/17 8:16, Boie, Andrew P wrote:
Hi Katsuhiro,

Who is maintainer of RISC-V porting area?
That is actually a pretty good question.
The Risc-V arch port is currently in an "orphaned" state, as noted in MAINTAINERS.yaml.
The original contributors have not been heard from for some time.
Oh... I didn't check MAINTAINERS.yaml.

The project could really use someone to step up and take over maintainership of this arch.
Hmm... Can I help this issue?

I have also been frustrated by this, as there are some other recent contributions to enable user mode on Risc-V, but finding people to review the code, or help with some of the HW issues Alexandre is seeing when testing it, has been difficult.
Are you talking about this PR?

I have HiFive Unleashed (RV64 board) and buy a HiFive1 Rev.B (RV32 board).
Maybe I can get it in this week. After I receive it, I can help creating
board config for these boards and basic testing on RV32/RV64 real HW...

Best Regards,
Katsuhiro Suzuki

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