Re: Support for Ambiq Apollo chips #bluetooth #ambiq
MichaĆ Ciesielski
Hey Keith,
Thanks for the lead. This certainly helps. I still have some questions, hope that's ok. Lets say I'm describing the bytes that relate to gpio controller A: ``` gpioa: gpio@40010000 { compatible = "ambiq,apollo3-gpio"; gpio-controller; reg = <0x40010000 4 /* PADREG */ 0x40010040 2 /* CFGA */ 0x400100e0 4 /* ALTPADCFGA */ 0x40010080 1 /* RDA (input read) */ 0x40010088 1 /* WTA (output write) */ 0x40010090 1 /* WTSA (output set) */ 0x40010098 1 /* WTCA (clear) */ 0x400100a0 1 /* ENA (enable) */ 0x400100a8 1 /* ENSA (set) */ 0x400100b4 1 /* ENCA (clear) */ >; ngpios = <4>; label = "GPIOA"; #gpio-cells = <2>; }; ``` RDA register is an input register to read the input state of the first 32 pins. RDB register holds the input state of the next 18 pins. How would I describe that in this gpio controller? Do I describe specific pins at this stage or is that the register I specify, combined with its size, should include all the bytes that refer to the controlled pins? Meaning that this memory description can include more than just bits referring to the pins connected to the gpio controller A and more specific pin description happens in another node. So the aforementioned RDA register is described here with its address and size of 32bits. That memory range 0x40010080 - 0x40010081 describes a register that is used by 32 pins. Another example is the ALTPADCFGA. It describes 32 pins using 4 32bits registers. Should I specify its size as 4 (entire register) or only 1 as the first byte of that register is the only one that references gpio controller A. I guess my problems come from the lack of understanding what exactly am I describing here. Thanks again, Michal On Mon, Apr 26, 2021 at 10:29 PM Keith Short <keithshort@...> wrote:
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