1. Messages
  2. info about device tree entry for STM32 micros

Re: info about device tree entry for STM32 micros

Andy Gross
 

I am pretty sure the encoding is the following:

<&rcc STM32_CLOCK_BUS_APB1 0x00040000>

First cell is reference to the clock node. That node will have a base
address. The second cell is which RCC register. In this case it is
APB1 (0x1c). Third cell is the mask for the enable bit for USART3.

On 8 August 2017 at 09:15, Kinder, David B <david.b.kinder@intel.com> wrote:
Start here for kernel clocks documentation:
https://www.zephyrproject.org/doc/kernel/timing/clocks.html#clocks-v2

-- david kinder

On Aug 8, 2017, at 9:53 AM, massimiliano cialdi
<massimiliano.cialdi@powersoft.it> wrote:

I am surfing in the device tree files for stm32f412 micro

I found

usart3: serial@40004800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40004800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>;
interrupts = <39 0>;
status = "disabled";
label = "UART_3";
};

I wonder where to find documentation about clocks entry. It seems to be a 3
element array, but I don't know the meaning of each of them


best regards

Max

_______________________________________________
Zephyr-devel mailing list
Zephyr-devel@lists.zephyrproject.org
https://lists.zephyrproject.org/mailman/listinfo/zephyr-devel

_______________________________________________
Zephyr-devel mailing list
Zephyr-devel@lists.zephyrproject.org
https://lists.zephyrproject.org/mailman/listinfo/zephyr-devel
Join devel@lists.zephyrproject.org to automatically receive all group messages.