Re: info about device tree entry for STM32 micros

Massimiliano Cialdi

this make sense (but the address of RCC_APB1RSTR is 0x20)

But this raises the question: where is it defined STM32_CLOCK_BUS_APB1 and how?

Grepping the entire zephyr source I find:

#define STM32_CLOCK_BUS_APB1 2

in file zephyr/include/dt-bindings/clock/stm32_clock.h

that is not 0x20 as I expect

best regards


On 08/08/2017 16:59, Andy Gross wrote:
I am pretty sure the encoding is the following:

<&rcc STM32_CLOCK_BUS_APB1 0x00040000>

First cell is reference to the clock node. That node will have a base
address. The second cell is which RCC register. In this case it is
APB1 (0x1c). Third cell is the mask for the enable bit for USART3.

On 8 August 2017 at 09:15, Kinder, David B <> wrote:
Start here for kernel clocks documentation:

-- david kinder

On Aug 8, 2017, at 9:53 AM, massimiliano cialdi
<> wrote:

I am surfing in the device tree files for stm32f412 micro

I found

usart3: serial@40004800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40004800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>;
interrupts = <39 0>;
status = "disabled";
label = "UART_3";

I wonder where to find documentation about clocks entry. It seems to be a 3
element array, but I don't know the meaning of each of them

best regards


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