Conor,

Thank you for sharing, this is great.

Just a quick comment, from a quick look at the links below, I noticed the arch changes to riscv adding smp support and other generic code references your SOC and hardware, this need to be made generic and vendor/soc agnostic before you submit to the zephyr tree.



Thanks,

Anas



From: <devel@...> on behalf of "conor.paxton via lists.zephyrproject.org" <conor.paxton=microchip.com@...>
Reply-To: "conor.paxton@..." <conor.paxton@...>
Date: Thursday, October 7, 2021 at 9:24 AM
To: "devel@..." <devel@...>
Subject: [Zephyr-devel] SMP support for RISC-V based Microchip PolarFire SoC Icicle Kit



Hi there,

We have been working on a port of zephyr for the Microchip PolarFire SoC Icicle Kit, focusing on SMP support. It is very much in initial stages, however,
we have tested it on our hardware using the smp/pi application and have had good results.
We would now like to put it out there, to see if we could get some feedback. We are on an older version of the zephyr code base (2.4.99), which we plan on updating
to the latest release in the coming weeks.

You can find the source our code here:
https://github.com/polarfire-soc/zephyr/tree/mpfs-zephyr

And information about the PolarFire SoC and Icicle Kit here:
https://github.com/polarfire-soc/zephyr/tree/mpfs-zephyr


Kind Regards,

Conor Paxton

conor.paxton@...
petermcshane@...