Date   

Attempting to assign value to undefined symbol error

Mike Marks
 

I am trying to work through the solved examples in the Bluetooth Mesh Developer Study Guide found here: Bluetooth Mesh Developer Study Guide v2.0 | Bluetooth® Technology Website
The code examples use Zephyr as a foundation for Bluetooth Mesh introductory examples. The Study Guide includes both starting point and solution code, and my focus is on getting the solution code examples for Switch and Light to compile.  For switch, I see this error message: "C:/Projects/BluetoothMeshDeveloperStudyGuideV2_0_0/code/solution/Switch/prj.conf:34: warning: attempt to assign the value '36' to the undefined symbol BT_MESH_RX_SDU_MAX" which appears to break the build. Complete build output here:
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------
C:\Projects\BluetoothMeshDeveloperStudyGuideV2_0_0\code\solution\Switch>west build -b nrf52840dk_nrf52840 --pristine
-- west build: making build dir C:\Projects\BluetoothMeshDeveloperStudyGuideV2_0_0\code\solution\Switch\build pristine
-- west build: generating a build system
-- Application: C:/Projects/BluetoothMeshDeveloperStudyGuideV2_0_0/code/solution/Switch
-- Using NCS Toolchain 1.5.0 for building. (C:/Users/mmarks/ncs/v1.5.0/toolchain/cmake)
-- Zephyr version: 2.4.99 (c:/users/mmarks/ncs/v1.5.0/zephyr)
-- Found Python3: C:/Users/mmarks/ncs/v1.5.0/toolchain/opt/bin/python.exe (found suitable exact version "3.8.2") found components: Interpreter
-- Found west (found suitable version "0.9.0", minimum required is "0.7.1")
-- Board: nrf52840dk_nrf52840
-- Cache files will be written to: C:\Users\mmarks\AppData\Local/.cache/zephyr
-- Found dtc: C:/Users/mmarks/ncs/v1.5.0/toolchain/opt/bin/dtc.exe (found suitable version "1.4.7", minimum required is "1.4.6")
-- Found toolchain: gnuarmemb (C:/Users/mmarks/ncs/v1.5.0/toolchain/opt)
-- Found BOARD.dts: C:/Users/mmarks/ncs/v1.5.0/zephyr/boards/arm/nrf52840dk_nrf52840/nrf52840dk_nrf52840.dts
-- Generated zephyr.dts: C:/Projects/BluetoothMeshDeveloperStudyGuideV2_0_0/code/solution/Switch/build/zephyr/zephyr.dts
-- Generated devicetree_unfixed.h: C:/Projects/BluetoothMeshDeveloperStudyGuideV2_0_0/code/solution/Switch/build/zephyr/include/generated/devicetree_unfixed.h
-- Generated device_extern.h: C:/Projects/BluetoothMeshDeveloperStudyGuideV2_0_0/code/solution/Switch/build/zephyr/include/generated/device_extern.h
 
C:/Projects/BluetoothMeshDeveloperStudyGuideV2_0_0/code/solution/Switch/prj.conf:34: warning: attempt to assign the value '36' to the undefined symbol BT_MESH_RX_SDU_MAX
Parsing c:/users/mmarks/ncs/v1.5.0/zephyr/Kconfig
Loaded configuration 'C:/Users/mmarks/ncs/v1.5.0/zephyr/boards/arm/nrf52840dk_nrf52840/nrf52840dk_nrf52840_defconfig'
Merged configuration 'C:/Projects/BluetoothMeshDeveloperStudyGuideV2_0_0/code/solution/Switch/prj.conf'
 
error: Aborting due to Kconfig warnings
 
CMake Error at C:/Users/mmarks/ncs/v1.5.0/zephyr/cmake/kconfig.cmake:262 (message):
  command failed with return code: 1
Call Stack (most recent call first):
  C:/Users/mmarks/ncs/v1.5.0/zephyr/cmake/app/boilerplate.cmake:534 (include)
  CMakeLists.txt:3 (include)
 
 
-- Configuring incomplete, errors occurred!
FATAL ERROR: command exited with status 1: 'C:\Program Files\CMake\bin\cmake.EXE' '-DWEST_PYTHON=c:\python39\python.exe' '-BC:\Projects\BluetoothMeshDeveloperStudyGuideV2_0_0\code\solution\Switch\build' '-SC:\Projects\BluetoothMeshDeveloperStudyGuideV2_0_0\code\solution\Switch' -GNinja -DBOARD=nrf52840dk_nrf52840
---------------------------------------------------------------------------------------------------------------------------------------------------------------------------
The symbol that it complains is undefined, BT_MESH_RX_SDU_MAX, is listed in prj.conf. Is there something I'm missing why the symbol shows up as undefined?

Thanks,
Mike Marks




Network forum agenda

Jukka Rissanen
 

Hi all,

There is a network forum meeting tomorrow Tue 4 May at 8AM PST / 17.00
CEST.

Currently the agenda is empty, so if there is anything network related
topics you want to discuss, please let me know, otherwise I will cancel
the meeting.

Live Agenda/Minutes:
https://docs.google.com/document/d/1qFsOpvbyLzhflJbbv4Vl__497pKHDoUCy9hjAveyCX0/edit?usp=sharing

Shared Folder:
https://drive.google.com/drive/folders/1j6d0FLeOjiMil1Ellb59AsfHdzuWdAAc?usp=sharing

___________________________________________________________
Join Microsoft Teams Meeting (
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)
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Orlando (Toll)
Conference ID: 458 216 365#
Local numbers (
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)


Cheers,
Jukka


Re: Zephyr x nRF52 Inquiry

David Rances <david@...>
 

Hi Jamie,

Thanks for the response.

Does that mean that if I have devices out in the field running firmware built on older Nordic code (SoftDevice and nRF52 SDK), the only way to get firmware built on Zephyr onto those devices would be to bring them in and physically erase/flash them? Since any existing methods to update the bootloader/application would be dependent on tools from Nordic that utilize the SoftDevice (OTA DFU) or their serial DFU using SLIP.

Best,
David

On Fri, Apr 30, 2021 at 4:51 PM Jamie Mccrae <Jamie.Mccrae@...> wrote:
Hi David,
Zephyr does not use the Nordic SDK softdevice, it comes with its own Bluetooth stack which gets compiled into your application hex file. You would get rid of the code on your module and flash just the zephyr hex file, or you could also flash mcuboot if you want a boot loader.
If you are using the nRF connect SDK which uses zephyr then the ‘softdevice’ mentioned there has no relation to the Nordic SDK softdevice, it is Nordic’s proprietary lower link layer Bluetooth stack but similar to if using the one in zephyr, it gets statically linked to your output application and so you do not need the Nordic SDK softdevice
Thanks,
Jamie


From: devel@... <devel@...> on behalf of David Rances via lists.zephyrproject.org <david=strongarmtech.com@...>
Sent: Friday, April 30, 2021 8:54 pm
To: devel@...
Subject: [Zephyr-devel] Zephyr x nRF52 Inquiry

Hi,

I've got a question regarding Zephyr for nRF52 devices. I have an nRF52832 device with an old application firmware and bootloader that is utilizing an older version of SoftDevice (v5) and SDKv14.2 from Nordic. I'm currently building an application with Zephyr right now to target the same hardware. Would I need to update the SoftDevice version on the device first in order for my Zephyr application to run? What SoftDevice version is the current Zephyr running?

Thanks,
David

--

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Email: david@...
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REMINDER - merge window closes this Friday - May 7th, 2021.

Kumar Gala
 

Hi,

This is a reminder that the v2.6.0 merge window for new features closes this Friday, 7th of May. After that, only bug fixes and documentation will be merged until the final release is tagged, which is targeted for Friday, May 28th. Exceptions require TSC approval. New feature PRs may still be submitted while the merge window is closed, but please keep in mind that maintainers will have less time to review them during the release stabilization period.

Please add the v2.6.0 milestone to PRs that need to be included in the release, and do not wait until Friday, May 7th to submit them.

https://github.com/zephyrproject-rtos/zephyr/wiki/Program-Management
https://github.com/zephyrproject-rtos/zephyr/pulls?q=is%3Apr+is%3Aopen+sort%3Aupdated-desc+milestone%3Av2.6.0

Please try to help fix bugs, test release candidates, and write release notes to minimize the time the merge window is closed so we can all quickly get back to adding fun new things to Zephyr!

Thank you for your contributions!

- k


Re: Zephyr x nRF52 Inquiry

lairdjm
 

Hi David,
Zephyr does not use the Nordic SDK softdevice, it comes with its own Bluetooth stack which gets compiled into your application hex file. You would get rid of the code on your module and flash just the zephyr hex file, or you could also flash mcuboot if you want a boot loader.
If you are using the nRF connect SDK which uses zephyr then the ‘softdevice’ mentioned there has no relation to the Nordic SDK softdevice, it is Nordic’s proprietary lower link layer Bluetooth stack but similar to if using the one in zephyr, it gets statically linked to your output application and so you do not need the Nordic SDK softdevice
Thanks,
Jamie


From: devel@... <devel@...> on behalf of David Rances via lists.zephyrproject.org <david=strongarmtech.com@...>
Sent: Friday, April 30, 2021 8:54 pm
To: devel@...
Subject: [Zephyr-devel] Zephyr x nRF52 Inquiry

Hi,

I've got a question regarding Zephyr for nRF52 devices. I have an nRF52832 device with an old application firmware and bootloader that is utilizing an older version of SoftDevice (v5) and SDKv14.2 from Nordic. I'm currently building an application with Zephyr right now to target the same hardware. Would I need to update the SoftDevice version on the device first in order for my Zephyr application to run? What SoftDevice version is the current Zephyr running?

Thanks,
David

--

________________________
David Rances   |   Embedded Engineer
Email: david@...
Cell: +1 917 476 3696

NOTICE: This email and its contents/attachments may be confidential and are intended solely for the individual to whom it is addressed. If you are not the named addressee or if this email is otherwise received in error, please immediately notify the sender without reading it; do not take any action based on its contents or otherwise copy or disclose it to anyone, and note that any review, reliance or dissemination of this communication is expressly prohibited.  Any opinions or views expressed in this transmission are solely of the author and do not necessarily represent those of StrongArm Technologies Inc. or its affiliates.


Zephyr x nRF52 Inquiry

David Rances <david@...>
 

Hi,

I've got a question regarding Zephyr for nRF52 devices. I have an nRF52832 device with an old application firmware and bootloader that is utilizing an older version of SoftDevice (v5) and SDKv14.2 from Nordic. I'm currently building an application with Zephyr right now to target the same hardware. Would I need to update the SoftDevice version on the device first in order for my Zephyr application to run? What SoftDevice version is the current Zephyr running?

Thanks,
David

--

________________________
David Rances   |   Embedded Engineer
Email: david@...
Cell: +1 917 476 3696

NOTICE: This email and its contents/attachments may be confidential and are intended solely for the individual to whom it is addressed. If you are not the named addressee or if this email is otherwise received in error, please immediately notify the sender without reading it; do not take any action based on its contents or otherwise copy or disclose it to anyone, and note that any review, reliance or dissemination of this communication is expressly prohibited.  Any opinions or views expressed in this transmission are solely of the author and do not necessarily represent those of StrongArm Technologies Inc. or its affiliates.


Re: Support for Ambiq Apollo chips #bluetooth #ambiq

Keith Short
 

Hi Michał -

You want the devicetree organization to match the hardware description.  So in the case of the Ambiq GPIO controller, I think your best bet is to create only GPIOA and GPIOB controllers.  This matches the register layout for the common runtime operations: read GPIO input (via RDA abd RDB), write GPIO output (via WTA/WTB, WTSA/WTSB, WTCA/WTCB).

GPIOA will set ngpios = <32> and GPIOB will set ngpios = <18>.

As for the registers, you would map the PADREGA-H, and CFGA-D to the GPIOA controller, PADREGI-M and CFGE-G to the GPIOB controller.

My approach would probably look something like this:

gpioa: gpio@40010000 {
compatible = "ambiq,apollo3-gpio";
gpio-controller;
reg = <0x40010000 0x20   /* PADREGA-H */
      0x40010040 0x10   /* CFGA-D */
      0x40010080 4   /* RDA (input read) */
      0x40010088 4   /* WTA (output write) */
      0x40010090 4   /* WTSA (output set) */
      0x40010098 4   /* WTCA (clear) */
      0x400100a0 4   /* ENA (enable) */
      0x400100a8 4   /* ENSA (set) */
      0x400100b4 4   /* ENCA (clear) */
      >;
ngpios = <32>;
label = "GPIOA";
#gpio-cells = <2>;
};

The actual driver code can define macros to convert the GPIO pin number (0-31) to the correct PADREGx register offset, and subfield within the register.

Keith



On Wed, Apr 28, 2021 at 7:03 AM Michał Ciesielski <ciesielskimm@...> wrote:
Hey Keith,

Thanks for the lead. This certainly helps. I still have some
questions, hope that's ok.

Lets say I'm describing the bytes that relate to gpio controller A:

```
gpioa: gpio@40010000 {
compatible = "ambiq,apollo3-gpio";
gpio-controller;
reg = <0x40010000 4   /* PADREG */
      0x40010040 2   /* CFGA */
      0x400100e0 4   /* ALTPADCFGA */
      0x40010080 1   /* RDA (input read) */
      0x40010088 1   /* WTA (output write) */
      0x40010090 1   /* WTSA (output set) */
      0x40010098 1   /* WTCA (clear) */
      0x400100a0 1   /* ENA (enable) */
      0x400100a8 1   /* ENSA (set) */
      0x400100b4 1   /* ENCA (clear) */
      >;
ngpios = <4>;
label = "GPIOA";
#gpio-cells = <2>;
};
```

RDA register is an input register to read the input state of the first
32 pins. RDB register holds the input state of the next 18 pins.
How would I describe that in this gpio controller? Do I describe
specific pins at this stage or is that the register I specify,
combined
with its size, should include all the bytes that refer to the
controlled pins? Meaning that this memory description can include more
than just bits referring to the pins connected to the gpio controller
A and more specific pin description happens in another node.
So the aforementioned RDA register is described here with its address
and size of 32bits. That memory range 0x40010080 - 0x40010081
describes a register that is used by 32 pins.

Another example is the ALTPADCFGA. It describes 32 pins using 4 32bits
registers. Should I specify its size as 4 (entire register) or
only 1 as the first byte of that register is the only one that
references gpio controller A.

I guess my problems come from the lack of understanding what exactly
am I describing here.

Thanks again,
Michal



On Mon, Apr 26, 2021 at 10:29 PM Keith Short <keithshort@...> wrote:
>
> The GPIO driver for the ITE IT8xxx2 family also interleaves the register space.
>
> You could follow the model used for that driver - create multiple reg phandles for the individual registers.
>
> https://github.com/zephyrproject-rtos/zephyr/blob/a3469a04978540b1d1cf0173bc557aeb9c0453be/dts/riscv/it8xxx2.dtsi#L93
>
> Keith
>
> On Sun, Apr 25, 2021 at 4:19 PM <ciesielskimm@...> wrote:
>>
>> Hello,
>>
>> I'm trying to add support for the Ambiq Apollo series chips. I'm new to the Zephyr and not very experienced with Device Tree format.
>> Currently I'm working on the zephyr/dts/arm/ambiq/apollo.dtsi. I'm trying to add the GPIO control registers. I'm modyfing
>> the STM32 dtsi file. STM32's define the GPIO control in a different way. All the Pad A registers are defined in a continous memory block.
>> In Ambiq SOCs those they are interleaved. The image below shows the memory map.
>>
>>
>>
>> First its the Pad configuration registers. Then its GPIO configuration register. I'm wondering how should I implement this
>> memory layout in the dtsi.


STM32: Clock control configuration moved from Kconfig to device tree

Erwan Gouriou
 

Hi,

We've started to transition STM32 clock system configuration from Kconfig to dts.

The main change (that introduces the whole mechanism) has been merged earlier this week,
making it available to L4/F4 and WB series:
It was followed by another change continuing the transition for remaining series 
(F0/F1/F2/F3/F7/G0/G4/L0/L1/L5/WL) and was merged earlier today.
The last change impacts H7 and is currently under review:

This series of changes allows to configure the whole stm32 clock system using
device tree, but for now, no extra modification is done in stm32 clock_control drivers. 

Kconfig style configuration is still functional but will be tagged as deprecated.
For now, only a couple of in tree boards have been converted to the new dts based
method.

I've raised an issue to track the mass conversion of the existing in tree boards
By the way, we're welcoming community contributions for this task!

Once all boards are converted, we'll be able to deprecate the Kconfig part,
which I hope could be done in DV2.6.0 timeframe.

During deprecation period, the stm32 clock_control developments involving 
device tree will be limited in order to keep backward compatibility with Kconfig.
This is done as a convenience for out of tree users. But for instance, code additions
like support of new series or PLLs will be implemented directly using device tree.

After the deprecation period, STM32 Kconfig clock_control part will be removed
and we'll be able to rework STM32 clock_control driver deeper and take advantage
of the benefits provided by device tree.

Don't hesitate to reach me on slack if you have questions.

Cheers
Erwan


Cancelled Event: Zephyr Project: Dev Meeting - Thursday, 29 April 2021 #cal-cancelled

devel@lists.zephyrproject.org Calendar <noreply@...>
 

Cancelled: Zephyr Project: Dev Meeting

This event has been cancelled.

When:
Thursday, 29 April 2021
3:00pm to 4:00pm
(UTC+00:00) UTC

Where:
Microsoft Teams Meeting

Organizer: devel@...

Description:

________________________________________________________________________________
+1 321-558-6518 United States, Orlando (Toll)
Conference ID: 483 314 739#
Local numbers | Reset PIN | Learn more about Teams | Meeting options
 
 
________________________________________________________________________________


Re: Dev-Review Meeting Agenda Apr 29

Bolivar, Marti
 

Hi; sorry for the short notice, but Dev-review is cancelled for today.

Kumar is on vacation (which is why I sent the agenda) and I've been
informed that today's dev-review conflicts with talk selection for the
Zephyr Developer summit, so our usual suspects from the TSC will be
unable to attend. Let's pick up next week.

Martí

"Bolivar, Marti via lists.zephyrproject.org"
<marti.bolivar=nordicsemi.no@lists.zephyrproject.org> writes:

Here's the agenda topics for this week:

Setup MPU for code relocated to SRAM
-
https://eur03.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2Fzephyrproject-rtos%2Fzephyr%2Fpull%2F34086&;data=04%7C01%7Cmarti.bolivar%40nordicsemi.no%7C62d7004197454960258b08d90b1214aa%7C28e5afa2bf6f419a8cf6b31c6e9e5e8d%7C0%7C0%7C637552994555348127%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=dQi43BfsOEa2U4SdGKddRsMpRAbu1fhKgK9DmDxAB0I%3D&amp;reserved=0

* Any topics anyone else has.


Zephyr Project: Dev Meeting - Thu, 04/29/2021 3:00pm-4:00pm, Please RSVP #cal-reminder

devel@lists.zephyrproject.org Calendar <devel@...>
 

Reminder: Zephyr Project: Dev Meeting

When: Thursday, 29 April 2021, 3:00pm to 4:00pm, (GMT+00:00) UTC

Where:Microsoft Teams Meeting

An RSVP is requested. Click here to RSVP

Organizer: devel@...

Description:

________________________________________________________________________________
+1 321-558-6518 United States, Orlando (Toll)
Conference ID: 483 314 739#
Local numbers | Reset PIN | Learn more about Teams | Meeting options
 
 
________________________________________________________________________________


RFC: API Change: flash_area #34706

Ermel, Dominik
 

Hello,

 

Some time ago I have posted flash_area changes, that have been only changing how device binding is performed, that has not been accepted (enhancement discussion “Use compile time resolved device bindings in flash map, when possible” , https://github.com/zephyrproject-rtos/zephyr/issues/34227) and it has been proposed to change flash_area to actually provide only features that Zephyr requires and limit the internals of flash_ara structure.

 

That has spawned my work on the subject that was intended to keep compatibility with existing solution and work, also with mcuboot, to make the changes and limit impact on the project.

As a result I have created the RFC RPs with preliminary solution that covers mcuboot and most of Zephyr so far:
mcuboot https://github.com/mcu-tools/mcuboot/pull/982
Zephyr https://github.com/zephyrproject-rtos/zephyr/pull/34530

 

And created RFC that summarizes the changes: https://github.com/zephyrproject-rtos/zephyr/issues/34706

 

The idea is to not add additional layer, reduce flash_area object size and code.

 

So far I have been able to successfully test changes with mcuboot, with slightly reduced flash occupancy, and all tests for flash_area that exist have been running successfully, with slight changes.

The proposed change allows to use flash_area API with IDs and by directly accessing the flash_area objets: my intention is to leave access via ID possible for external entities that use flash_area_open function to get access to area and at the same time change internal, within Zephyr repo code base, access to directly use flash_area objects which can now be obtained by FLASH_AREA(…) macro that works similar to existin FLASH_AREA_ID(..) macro, but returns flash_area object pointer instead of ID.

 

There is still work ongoing on documentation needed and additional test cases but due to kept compatibility with existing solution the transition should be quite simple and reliable.

 

Best regards,

Dominik Ermel


Dominik ERMEL | Senior Software Engineer
M +48 505 071 130 | Kraków, Poland
nordicsemi.com | devzone.nordicsemi.com

Nordic_logo_signature

 


Dev-Review Meeting Agenda Apr 29

Bolivar, Marti
 

Here's the agenda topics for this week:

Setup MPU for code relocated to SRAM
-
https://github.com/zephyrproject-rtos/zephyr/pull/34086

* Any topics anyone else has.


Cancelled Event: Zephyr: Toolchain Working Group - Monday, 3 May 2021 #cal-cancelled

devel@lists.zephyrproject.org Calendar <noreply@...>
 

Cancelled: Zephyr: Toolchain Working Group

This event has been cancelled.

When:
Monday, 3 May 2021
3:00pm to 4:00pm
(UTC+00:00) UTC

Where:
Microsoft Teams Meeting

Organizer: Torsten Rasmussen

Description:

________________________________________________________________________________
+1 321-558-6518 United States, Orlando (Toll)
Conference ID: 682 738 030#
Local numbers | Reset PIN | Learn more about Teams | Meeting options
 
 


Googletest as a Zephyr module for native_posix target #nrf52

tjones@...
 
Edited

[I may have posted this in the wrong group, so I've also raised it in Zephyr Users.]

I'm new to Zephyr and am trying to get a Linux VM hosted native_posix unit test build environment set up for our Zephyr nRF52 embedded project. 

I've set up the Zephyr SDK and west native_posix (& qemu_x86) build environment and can build and run the samples and a simple hello world test under my Ubuntu 20.04 Linux VM.

We'd like to use GoogleTest/Mock for our unit test environment within the Zephyr native_posix environment. Has anyone here got that working? I've got some way following this StackOverflow post unit-testing-c-code-into-zephyr-with-googletest , but unfortunately it does not provide details of the module.yml and Kconfig file contents. I don't yet know enough to fill them in myself and west / cmake reports that my googletest module is "not a valid zephyr module".

Any help or pointers would be appreciated!


Re: Support for Ambiq Apollo chips #bluetooth #ambiq

Michał Ciesielski
 

Hey Keith,

Thanks for the lead. This certainly helps. I still have some
questions, hope that's ok.

Lets say I'm describing the bytes that relate to gpio controller A:

```
gpioa: gpio@40010000 {
compatible = "ambiq,apollo3-gpio";
gpio-controller;
reg = <0x40010000 4 /* PADREG */
0x40010040 2 /* CFGA */
0x400100e0 4 /* ALTPADCFGA */
0x40010080 1 /* RDA (input read) */
0x40010088 1 /* WTA (output write) */
0x40010090 1 /* WTSA (output set) */
0x40010098 1 /* WTCA (clear) */
0x400100a0 1 /* ENA (enable) */
0x400100a8 1 /* ENSA (set) */
0x400100b4 1 /* ENCA (clear) */
>;
ngpios = <4>;
label = "GPIOA";
#gpio-cells = <2>;
};
```

RDA register is an input register to read the input state of the first
32 pins. RDB register holds the input state of the next 18 pins.
How would I describe that in this gpio controller? Do I describe
specific pins at this stage or is that the register I specify,
combined
with its size, should include all the bytes that refer to the
controlled pins? Meaning that this memory description can include more
than just bits referring to the pins connected to the gpio controller
A and more specific pin description happens in another node.
So the aforementioned RDA register is described here with its address
and size of 32bits. That memory range 0x40010080 - 0x40010081
describes a register that is used by 32 pins.

Another example is the ALTPADCFGA. It describes 32 pins using 4 32bits
registers. Should I specify its size as 4 (entire register) or
only 1 as the first byte of that register is the only one that
references gpio controller A.

I guess my problems come from the lack of understanding what exactly
am I describing here.

Thanks again,
Michal



On Mon, Apr 26, 2021 at 10:29 PM Keith Short <keithshort@google.com> wrote:

The GPIO driver for the ITE IT8xxx2 family also interleaves the register space.

You could follow the model used for that driver - create multiple reg phandles for the individual registers.

https://github.com/zephyrproject-rtos/zephyr/blob/a3469a04978540b1d1cf0173bc557aeb9c0453be/dts/riscv/it8xxx2.dtsi#L93

Keith

On Sun, Apr 25, 2021 at 4:19 PM <ciesielskimm@gmail.com> wrote:

Hello,

I'm trying to add support for the Ambiq Apollo series chips. I'm new to the Zephyr and not very experienced with Device Tree format.
Currently I'm working on the zephyr/dts/arm/ambiq/apollo.dtsi. I'm trying to add the GPIO control registers. I'm modyfing
the STM32 dtsi file. STM32's define the GPIO control in a different way. All the Pad A registers are defined in a continous memory block.
In Ambiq SOCs those they are interleaved. The image below shows the memory map.



First its the Pad configuration registers. Then its GPIO configuration register. I'm wondering how should I implement this
memory layout in the dtsi.


Zephyr Project: APIs - Tue, 04/27/2021 4:00pm-5:00pm, Please RSVP #cal-reminder

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Reminder: Zephyr Project: APIs

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v2.6.0 merge window closes Friday, May 7th

Kumar Gala
 

Hi,

This is a reminder that the v2.6.0 merge window for new features closes this Friday, 7th of May. After that, only bug fixes and documentation will be merged until the final release is tagged, which is targeted for Friday, May 28th. Exceptions require TSC approval. New feature PRs may still be submitted while the merge window is closed, but please keep in mind that maintainers will have less time to review them during the release stabilization period.

Please add the v2.6.0 milestone to PRs that need to be included in the release, and do not wait until Friday, May 7th to submit them.

https://github.com/zephyrproject-rtos/zephyr/wiki/Program-Management
https://github.com/zephyrproject-rtos/zephyr/pulls?q=is%3Apr+is%3Aopen+sort%3Aupdated-desc+milestone%3Av2.6.0

Please try to help fix bugs, test release candidates, and write release notes to minimize the time the merge window is closed so we can all quickly get back to adding fun new things to Zephyr!

Thank you for your contributions!

- k


API meeting: agenda

Carles Cufi
 


Re: Support for Ambiq Apollo chips #bluetooth #ambiq

Keith Short
 

The GPIO driver for the ITE IT8xxx2 family also interleaves the register space.

You could follow the model used for that driver - create multiple reg phandles for the individual registers.


Keith

On Sun, Apr 25, 2021 at 4:19 PM <ciesielskimm@...> wrote:
Hello,

I'm trying to add support for the Ambiq Apollo series chips. I'm new to the Zephyr and not very experienced with Device Tree format.
Currently I'm working on the zephyr/dts/arm/ambiq/apollo.dtsi. I'm trying to add the GPIO control registers. I'm modyfing
the STM32 dtsi file. STM32's define the GPIO control in a different way. All the Pad A registers are defined in a continous memory block.
In Ambiq SOCs those they are interleaved. The image below shows the memory map.



First its the Pad configuration registers. Then its GPIO configuration register. I'm wondering how should I implement this
memory layout in the dtsi.

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