Hi guys, I am using the nRF52832 board and I want to parse and read my JSON file. I don't have too much experience working with cJSON and here you will find my simple code where I try to understand

That PR looks fine. But you definitely will have some work to do to get SMP working on Risc-V, starting with changing the arch to select CONFIG_SWITCH, and then implement arch_start_cpu(),

Hello Kumar, Sorry for multi posting. Zephyr ML has very long delay to deliver my mail...?? Anyway, thanks a lot for your comment. I'll add the config. BTW, QEMU can choose SMP mode or non-SMP

Reminder: Zephyr Project: APIs When: Tuesday, 6 October 2020, 4:00pm to 5:00pm, (GMT+00:00) UTC Where:Microsoft Teams Meeting An RSVP is requested. Click here to RSVP Organizer:

Hi all, An additional item for today: - Cleanup of work queue API doc - PR: https://github.com/zephyrproject-rtos/zephyr/pull/28824

Would probably be good to add a second SMP config for qemu_riscv32 for SMP=y. You can look at the boards/x86/qemu_x86 to see examples of having different configs. As for testing, I’m guessing the

Hi all, Agenda for today, sorry for the short notice. - Pinmux and pinctrl API: Decide what the priorities for this are, and how to get to LTS with it - Issue:

Hello All, I'm working on SMP support for RISC-V privilege architecture. https://github.com/katsuster/zephyr/tree/riscv_virt_pc_smp It seems worked well on QEMU RV32 virt pc (*) porting. (RV64 not

Hello All, I'm working on SMP support for RISC-V privilege architecture. https://github.com/katsuster/zephyr/tree/riscv_virt_pc_smp It seems worked well on QEMU RV32 virt pc (*) porting. (RV64 not

Hello All, I'm working on SMP support for RISC-V privilege architecture. https://github.com/katsuster/zephyr/tree/riscv_virt_pc_smp It seems worked well on QEMU RV32 virt pc (*) porting. (RV64 not

Hi, Latest version of the SDK can be found here: https://github.com/zephyrproject-rtos/sdk-ng/releases/tag/v0.12.0-alpha-1 Please download and try things out and report any issues. Please report

Hi all, There is a network forum meeting tomorrow Tuesday 6 Oct at 8AM PDT / 17.00 CET. Agenda: - TCP2 is now the default TCP implementation, legacy TCP implementation is not yet removed. We can

Hi Krzysztof, I'm assuming that you're referring to ARM Cortex-A? A patch recently landed to implement switch instead of swap:https://github.com/zephyrproject-rtos/zephyr/pull/27766. There is a

This RFC has been withdrawn. Instead the documentation of the existing API will be updated to describe its behavior more precisely, and ultimately deprecated in favor of a new API and recommended

Hi, For our multicore ARM based project we would like to use SMP and affinity mechanism in Zephyr. When digging into the code I found that it is not implemented. Mainly, there is an implementation of

Reminder: Zephyr Project: Dev Meeting When: Thursday, 1 October 2020, 3:00pm to 4:00pm, (GMT+00:00) UTC Where:Microsoft Teams Meeting An RSVP is requested. Click here to RSVP Organizer:

Added to agenda: drivers: flash: nrf_qspi_nor: remove multithreading dependency - https://github.com/zephyrproject-rtos/zephyr/pull/28740 For discussion on our policy w/regards to updates & fixes

Here’s the agenda topics for this week: * List property label for all active ADCs regardless of the board used: - https://github.com/zephyrproject-rtos/zephyr/issues/28566 * DTS default usage

Hi Folks, There is a LoRaWAN PR posted a while ago [1] and it has undergone reviews from several developers. But it still got stuck and I'd appreciate any help to move this forward. This will be a

TL;DR: - Upcoming device tree based pin configuration for STM32 based boards - Script generated, SoC package specific *-pinctrl.dtsi files are available in hal_stm32 modules - Each *.pcintrl.dtsi file