Hi there, I’m wondering by which means to figure out the static stack size for a thread? Thank you! Jun Li NTG | Intel Corporation | Santa Clara

Thank you for the patch. The test case tests/kernel/test_build should have caught this in its newlib configuration, but the build passes in that scenario. I'm looking into why this is the case.

Andrew, Thanks for the information. It turns out an typo in the xtensa linker.ld. newlib references "__heap_sentry" but "_heap_sentry" is defined in the linker script. I've created a PR #1072 for

Aska, __heap_sentry is a linker symbol, defined for qemu_xtensa in the linker script, arch/xtensa/soc/sample_controller/linker.ld, near the bottom. It marks the beginning of a RAM area used for

Paul, I might take some time to investigate it. But I think I should exclude qemu_xtensa as a short-term workaround. Regards. Aska

<massimiliano.cialdi@...> wrote: So if there are pin differences between the two, then anything non generic needs to be removed from the .dtsi and put inside a more specific .dtsi file that

Fo the nucleo_f412zg there is the file zephyr/dts/arm/nucleo_f412zg.dts that includes st/stm32f412.dtsi and then #include <st/stm32f412-pinctrl.dtsi> #include <st/stm32f411.dtsi> stm32f411.dtsi

<massimiliano.cialdi@...> wrote: Looking at the drivers/clock_control/stm32_ll_clock.c, they use switch statements to steer the programming for the clock enables. The actual call makes a

this make sense (but the address of RCC_APB1RSTR is 0x20) But this raises the question: where is it defined STM32_CLOCK_BUS_APB1 and how? Grepping the entire zephyr source I find: #define

I am pretty sure the encoding is the following: <&rcc STM32_CLOCK_BUS_APB1 0x00040000> First cell is reference to the clock node. That node will have a base address. The second cell is which RCC

Start here for kernel clocks documentation: https://www.zephyrproject.org/doc/kernel/timing/clocks.html#clocks-v2 -- david kinder

I am surfing in the device tree files for stm32f412 micro I found usart3: serial@40004800 { compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40004800 0x400>; clocks = <&rcc

I believe there is no standard way in Zephyr to select debug interface so far but if you use OPENOCD_INTERFACE environment variable we would establish a standard, for OpenOCD that is. In case of

Hello All, Is there a standardized way to switch debugger/flash tool ? I want to use the ST-Link2 with the Olimexino board, but I have to change the openocd.conf file to do so, because the board

Hi Boie， Got it, thanks! 2017年1月18日 00:41于 "Boie, Andrew P" <andrew.p.boie@...>写道：

yes, follow the instructions: Page: https://www.zephyrproject.org/doc/getting_started/getting_started.html Section: Using Custom and 3rd Party Cross

It seems to have figured out by itself that it has to rerun shipable. - Erwin

Might try a PR close/open to give shippable a kick? -- david kinder

Hey all, my PR caused a shipable timeout; https://app.shippable.com/github/zephyrproject-rtos/zephyr/runs/3031/3/console What do I do now ? - Erwin

Hi all, I got closer with Zephyr USB device stack while I wrote USB device driver for Kinetis [1]. There are a few things that are not optimal and which I would like to improve. * USB controllers