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Re: ADC driver and power management API
Hi Piotr,
Good point. ADC API was designed some months before PM one, and was not revised once the later came in.
Sounds like you can throw a PR to remove these.
Hi Piotr,
Good point. ADC API was designed some months before PM one, and was not revised once the later came in.
Sounds like you can throw a PR to remove these.
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By
Tomasz Bursztyka
·
#827
·
|
|
ADC driver and power management API
Hi all,
The ADC driver API specifies adc_enable / adc_disable functions. The doxygen documentation of adc_enable function states: "This routine enables the ADC hardware block for data
Hi all,
The ADC driver API specifies adc_enable / adc_disable functions. The doxygen documentation of adc_enable function states: "This routine enables the ADC hardware block for data
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By
Piotr Mienkowski
·
#826
·
|
|
Re: Nucleo f030r8 fails at QEMU Cortex M3 test
The deeper context here is that we have a number of timing-sensitive tests which sometimes fall over if the server running sanitycheck is heavily loaded. AFAICT, this is due to QEMU trying to
The deeper context here is that we have a number of timing-sensitive tests which sometimes fall over if the server running sanitycheck is heavily loaded. AFAICT, this is due to QEMU trying to
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By
Boie, Andrew P
·
#825
·
|
|
Re: Nucleo f030r8 fails at QEMU Cortex M3 test
Hi,
There was an issue in how we re-run sanitycheck on failed tests (retry) to eliminate false positive due to heavy load and Qemu not being able to deal with that. This is now fixed.
Anas
Hi,
There was an issue in how we re-run sanitycheck on failed tests (retry) to eliminate false positive due to heavy load and Qemu not being able to deal with that. This is now fixed.
Anas
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By
Nashif, Anas
·
#824
·
|
|
Re: Nucleo f030r8 fails at QEMU Cortex M3 test
Hello Maciej,
Maciej Dębski <maciej.debski@...> wrote:
*All* tests fail sooner or later, with or without a reason. (As Murphy
would add, non-tests fail sooner or later too.) If you're sure
Hello Maciej,
Maciej Dębski <maciej.debski@...> wrote:
*All* tests fail sooner or later, with or without a reason. (As Murphy
would add, non-tests fail sooner or later too.) If you're sure
|
By
Paul Sokolovsky
·
#823
·
|
|
Nucleo f030r8 fails at QEMU Cortex M3 test
Hello,
I just posted a pull request for my nucleo f030r8 support. Here it is:
https://github.com/zephyrproject-rtos/zephyr/pull/1103
The shippable ran all the tests correctly, just one with a failure,
Hello,
I just posted a pull request for my nucleo f030r8 support. Here it is:
https://github.com/zephyrproject-rtos/zephyr/pull/1103
The shippable ran all the tests correctly, just one with a failure,
|
By
Maciej Dębski <maciej.debski@...>
·
#821
·
|
|
Nucleo f030r8 fails at QEMU Cortex M3 test
Hello,
I just posted a pull request for my nucleo f030r8 support. Here it is:
https://github.com/zephyrproject-rtos/zephyr/pull/1103
The shippable ran all the tests correctly, just one with a failure,
Hello,
I just posted a pull request for my nucleo f030r8 support. Here it is:
https://github.com/zephyrproject-rtos/zephyr/pull/1103
The shippable ran all the tests correctly, just one with a failure,
|
By
Maciej Dębski <maciej.debski@...>
·
#822
·
|
|
Re: Bluetooth Mesh - configuration server client and helth server client models
Hi Jehudi,
The Client models would typically be operated by a device with a rich &
interactive user interface. As something like that is rarely found on
Zephyr-based device only the Server models are
Hi Jehudi,
The Client models would typically be operated by a device with a rich &
interactive user interface. As something like that is rarely found on
Zephyr-based device only the Server models are
|
By
Johan Hedberg
·
#820
·
|
|
Bluetooth Mesh - configuration server client and helth server client models
Hi,
In the bluetooth mesh samples it is shown how to set-up and use the configuration server and health server root models. Is there also an example on how to use the configuration client and health
Hi,
In the bluetooth mesh samples it is shown how to set-up and use the configuration server and health server root models. Is there also an example on how to use the configuration client and health
|
By
laczenJMS
·
#819
·
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|
Re: How to figure out the stack size for a thread?
Great! Thank you, Mike and Andrew!
From: Michael Rosen <michael.r.rosen@...>
Date: Thursday, August 10, 2017 at 11:41
To: "Li, Jun R" <jun.r.li@...>, "zephyr-devel@..." <zephyr-devel@...>
Subject:
Great! Thank you, Mike and Andrew!
From: Michael Rosen <michael.r.rosen@...>
Date: Thursday, August 10, 2017 at 11:41
To: "Li, Jun R" <jun.r.li@...>, "zephyr-devel@..." <zephyr-devel@...>
Subject:
|
By
Li, Jun R
·
#818
·
|
|
Re: How to figure out the stack size for a thread?
Jun,
You can use CONFIG_STACK_USAGE to have the build system generate the .su files which summarize the stack usage (if computable at compile time) of all the functions in all the files. You can
Jun,
You can use CONFIG_STACK_USAGE to have the build system generate the .su files which summarize the stack usage (if computable at compile time) of all the functions in all the files. You can
|
By
Michael Rosen
·
#817
·
|
|
Re: How to figure out the stack size for a thread?
Enable CONFIG_INIT_STACKS.
Use STACK_ANALYZE() from include/misc/stack.h to see how much of your thread stack has been used, that should help you to tune the size value.
HTH,
Andrew
Enable CONFIG_INIT_STACKS.
Use STACK_ANALYZE() from include/misc/stack.h to see how much of your thread stack has been used, that should help you to tune the size value.
HTH,
Andrew
|
By
Boie, Andrew P
·
#816
·
|
|
How to figure out the stack size for a thread?
Hi there,
I’m wondering by which means to figure out the static stack size for a thread? Thank you!
Jun Li
NTG | Intel Corporation | Santa Clara
Hi there,
I’m wondering by which means to figure out the static stack size for a thread? Thank you!
Jun Li
NTG | Intel Corporation | Santa Clara
|
By
Li, Jun R
·
#815
·
|
|
Re: Link error "undefined reference to `__heap_sentry'"
Thank you for the patch.
The test case tests/kernel/test_build should have caught this in its newlib configuration, but the build passes in that scenario. I'm looking into why this is the case.
Thank you for the patch.
The test case tests/kernel/test_build should have caught this in its newlib configuration, but the build passes in that scenario. I'm looking into why this is the case.
|
By
Boie, Andrew P
·
#814
·
|
|
Re: Link error "undefined reference to `__heap_sentry'"
Andrew,
Thanks for the information. It turns out an typo in the xtensa linker.ld. newlib references "__heap_sentry" but "_heap_sentry" is defined in the linker script. I've created a PR #1072 for
Andrew,
Thanks for the information. It turns out an typo in the xtensa linker.ld. newlib references "__heap_sentry" but "_heap_sentry" is defined in the linker script. I've created a PR #1072 for
|
By
aska.wu
·
#813
·
|
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Re: Link error "undefined reference to `__heap_sentry'"
Aska,
__heap_sentry is a linker symbol, defined for qemu_xtensa in the linker script, arch/xtensa/soc/sample_controller/linker.ld, near the bottom. It marks the beginning of a RAM area used for
Aska,
__heap_sentry is a linker symbol, defined for qemu_xtensa in the linker script, arch/xtensa/soc/sample_controller/linker.ld, near the bottom. It marks the beginning of a RAM area used for
|
By
Boie, Andrew P
·
#812
·
|
|
Re: Link error "undefined reference to `__heap_sentry'"
Paul,
I might take some time to investigate it. But I think I should exclude qemu_xtensa as a short-term workaround.
Regards.
Aska
Paul,
I might take some time to investigate it. But I think I should exclude qemu_xtensa as a short-term workaround.
Regards.
Aska
|
By
aska.wu
·
#811
·
|
|
Re: info about device tree for stm32f412zg
<massimiliano.cialdi@...> wrote:
So if there are pin differences between the two, then anything non
generic needs to be removed from the .dtsi and put inside a more
specific .dtsi file that
<massimiliano.cialdi@...> wrote:
So if there are pin differences between the two, then anything non
generic needs to be removed from the .dtsi and put inside a more
specific .dtsi file that
|
By
Andy Gross
·
#810
·
|
|
info about device tree for stm32f412zg
Fo the nucleo_f412zg there is the file
zephyr/dts/arm/nucleo_f412zg.dts
that includes st/stm32f412.dtsi and then
#include <st/stm32f412-pinctrl.dtsi>
#include <st/stm32f411.dtsi>
stm32f411.dtsi
Fo the nucleo_f412zg there is the file
zephyr/dts/arm/nucleo_f412zg.dts
that includes st/stm32f412.dtsi and then
#include <st/stm32f412-pinctrl.dtsi>
#include <st/stm32f411.dtsi>
stm32f411.dtsi
|
By
Massimiliano Cialdi
·
#809
·
|
|
Re: info about device tree entry for STM32 micros
<massimiliano.cialdi@...> wrote:
Looking at the drivers/clock_control/stm32_ll_clock.c, they use switch
statements to steer the programming for the clock enables. The actual
call makes a
<massimiliano.cialdi@...> wrote:
Looking at the drivers/clock_control/stm32_ll_clock.c, they use switch
statements to steer the programming for the clock enables. The actual
call makes a
|
By
Andy Gross
·
#808
·
|