Reminder: Zephyr: Toolchain Working Group When: Monday, 8 February 2021, 4:00pm to 5:00pm, (GMT+00:00) UTC Where:Microsoft Teams Meeting An RSVP is requested. Click here to RSVP Organizer:

Hi, The third release candidate for Zephyr v2.5.0 has been tagged (v2.5.0-rc3). The merge window for features and enhancements remains closed until v2.5.0 is released. The next release milestone

Reminder: Zephyr Project: Dev Meeting When: Thursday, 4 February 2021, 4:00pm to 5:00pm, (GMT+00:00) UTC Where:Microsoft Teams Meeting An RSVP is requested. Click here to RSVP Organizer:

Here’s the agenda topics for this week: usb: mass storage: use inquiry parameters from Kconfig - https://github.com/zephyrproject-rtos/zephyr/pull/31834 * Any PR/issues w/dev-review

Hi Fabio, Thanks for your email. To the best of my knowledge, none is working on ZLI on Baseline Cortex-M. If you would like to move with this forward, the best way is to an RFC issue in the Zephyr

Hi, The second release candidate for Zephyr v2.5.0 has been tagged (v2.5.0-rc2). The merge window for features and enhancements remains closed until v2.5.0 is released. The next release milestone

Reminder: Zephyr: Networking Forum When: Tuesday, 2 February 2021, 4:00pm to 5:00pm, (GMT+00:00) UTC Where:Microsoft Teams Meeting An RSVP is requested. Click here to RSVP Organizer:

The main core has to set which pins can be accessed/controlled by the secondary core, for example with the nRF5340 there is code which is included and runs on the main core to enable the UART pins to

Maybe a simple example would help. But why have the main core involved in the pin config at all? Seems like having the driver on the secondary core manage the pins that are needed would be easier.

Cancelled: Zephyr Project: APIs This event has been cancelled. When: Tuesday, 2 February 2021 5:00pm to 6:00pm (UTC+00:00) UTC Where: Microsoft Teams Meeting Organizer:

Hi all, I am cancelling the API meeting today due to a conflict and the fact that there were no scheduled discussions to take place besides going over the current open GitHub issues to fix for

Hi, Does anyone have suggestions for how to configure a peripheral on a dual core chip from the main core so it can be used by the secondary core but in a way that the devices are synchronised in DTS

Lvgl is part of zephyr already and has widespread support and examples.

Hi all, There is a network forum meeting tomorrow Tue 2 Feb at 8AM PST / 17.00 CET. Currently the agenda is empty, so if there is anything network related topics you want to discuss, please let me

dear, what's the best GUI framework for zephyr,or what's the good start point if I want to integrate one? thanks!

Cancelled: Zephyr Project: Dev Meeting This event has been cancelled. When: Thursday, 28 January 2021 4:00pm to 5:00pm (UTC+00:00) UTC Where: Microsoft Teams Meeting Organizer:

Reminder: Zephyr Project: APIs When: Tuesday, 26 January 2021, 5:00pm to 6:00pm, (GMT+00:00) UTC Where:Microsoft Teams Meeting An RSVP is requested. Click here to RSVP Organizer:

Hi Carles, Thanks for sharing the information. We are planning to use uart-H4 protocol and it’s a dual mode controller. My understanding is that H4tl module on controller side will be interacting

Hi all, Agenda for today: - Watchdog Example not working as expected on a Nordic chip Issue: https://github.com/zephyrproject-rtos/zephyr/issues/29991 - sensor: add TI FDC2X1X sensor driver and

Hi, Latest version of the SDK can be found here: https://github.com/zephyrproject-rtos/sdk-ng/releases/tag/v0.12.2 Please download and try things out and report any issues. [ I skipped the release