Hi everyone: whey the SMP version of zephyr kernel idle task has involke the "k_busy_wait"? and it is especially unreasonable to pass the delay time with 100. why not 200, 300, 400..... and so on? i c

Hi folks: a puzzle in the timer tick interrupt handler in SMP mode. look at below, the SMP mult cores share the same "cur_tick" object to remeber the current time, each cpu would increment it when the

Hi folks:

Hi friends: a puzzle in the timer tick interrupt handler in SMP mode. look at below, the SMP mult cores share the same "cur_tick" object to remeber the current time, each cpu would increment it when t

could you show me where the logic you said locates? i still cant catches it, thank you

I still cant understand this flow after read the code. take cortex-m arch for exmaple, z_clock_isr, is hooked for NVIC vector table, so each cores would call this following the frequency. so, there mu

Hi andrew: i find the place you said laste emai, it seems only xtensa and x84 arch supports the SMP mode, so take xtensa for exmaple. it seems the mechanism you said in the laste email only effect whe

HI guys: in kerne impl. many scenarios would call the z_reschedule to yield volunteer if the thread`s resource request did not meets. but the "resched" condition check confuse me, it seems only the ca

Hi folks: i want to get the compiler process details output when using west build command, so, how to get this? 曹子龙 珠海全志科技股份有限公司 BU1-PSW 地址：广东省珠海市高新区唐家湾镇科技2路9号 TEL：13824125580 Email：caozilong@allwinne

Hi folks: I know the device three mechanism is also applied in zephyr sdk, but it seems something diffferent compare with in linux. in linux, the dtsi script file would be compiled to a binary blob wh

Hi folks: I know the device tree mechanism is also applied in zephyr sdk, but it seems something diffferent compare with in linux. in linux, the dtsi script file would be compiled to a binary blob whi

Hi folks: Did the SMP impl. of zephyr support the cpu affinity settings? i have not seen the related members in k_thread structure. Thanks for your kindly help.! 曹子龙 珠海全志科技股份有限公司 BU1-PSW 地址：广东省珠海市高新区唐

Hi folks: throught the docment of zephyr smp imple. a task take the irq_lock can be yield to another thread, but would restore the spinlock own status when it comes back but, throught the code, i just

HI folks: Did the SMP support arm architecture boards presents? if yes, which one? Thank you! 曹子龙 珠海全志科技股份有限公司 BU1-PSW 地址：广东省珠海市高新区唐家湾镇科技2路9号 TEL：13824125580 Email：caozilong@... 网址： http

Hi folks: why there are two implmentations of schedule? What is the difference "z_reschedule_irqlock" and "z_reschedule“? why two implementations? 曹子龙 珠海全志科技股份有限公司 BU1-PSW 地址：广东省珠海市高新区唐家湾镇科技2路9号 TEL：1

HI folks: if from the call pass of z_swap, which with parameter, do_swap(key.key, lock, 1); because is_spinlock is 1, so the lock would be released before invoke the actual switch function "arch_switc

Hi andy: so, this is turely a issue that i have illustrated in last emai? is that true? so the mainline code still has this issue, right? thank you. 曹子龙 珠海全志科技股份有限公司 BU1-PSW 地址：广东省珠海市高新区唐家湾镇科技2路9号 TEL

HI folks: i still belive there are race conditions exist. in "do_swap" function, what would happen if others cpus pick up the "old" thread to run before it do the actual context backup? because if "is

hi : would the "wait_for_switch(new_thread)" would aggravate the race condition not fix the race condition？ the old thread save state still cant guarantee to be saved before it pick up by other cpus t

Now SMP only supported on xtensa, arc and x86 arch, but it seems more diffculte to run on xtensa and arc becasue of no boards. so anybody can tell me how to launch a smp run environment on x86 arch? t