I still cant understand this flow after read the code. take cortex-m arch for exmaple, z_clock_isr, is hooked for NVIC vector table, so each cores would call this following the frequency. so, there mu

could you show me where the logic you said locates? i still cant catches it, thank you

Hi friends: a puzzle in the timer tick interrupt handler in SMP mode. look at below, the SMP mult cores share the same "cur_tick" object to remeber the current time, each cpu would increment it when t

Hi folks:

Hi folks: a puzzle in the timer tick interrupt handler in SMP mode. look at below, the SMP mult cores share the same "cur_tick" object to remeber the current time, each cpu would increment it when the

Hi everyone: whey the SMP version of zephyr kernel idle task has involke the "k_busy_wait"? and it is especially unreasonable to pass the delay time with 100. why not 200, 300, 400..... and so on? i c