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QEMU networking problem - has anyone ever run into this problem?
Nevermind, I figured it out...
Nevermind, I figured it out...
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By
Immo Birnbaum
· #7169
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QEMU networking problem - has anyone ever run into this problem?
Hi all, I'm having a bit of an issue when it comes to exchanging network packets with QEMU via the TAP interface "zeth" as set up by net-setup.sh. When building the TCP socket echo server demo for the
Hi all, I'm having a bit of an issue when it comes to exchanging network packets with QEMU via the TAP interface "zeth" as set up by net-setup.sh. When building the TCP socket echo server demo for the
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Immo Birnbaum
· #7166
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ARMv7 Cortex-A port for Xilinx Zynq7000
Hey everyone, here's another update regarding the ARMv7 port: other than the 'interrupt' test, which I blacklisted, I've now got green lights on all kernel tests running on the QEMU Cortex-A9 (Zynq) t
Hey everyone, here's another update regarding the ARMv7 port: other than the 'interrupt' test, which I blacklisted, I've now got green lights on all kernel tests running on the QEMU Cortex-A9 (Zynq) t
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Immo Birnbaum
· #6874
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ARMv7 Cortex-A port for Xilinx Zynq7000
Hi Jukka, thanks for the info, I looked at the YAML files of other platforms and eventually came across the "-netif:eth" switch. Once I had that integrated, I had a bit of a fight against the QEMU sys
Hi Jukka, thanks for the info, I looked at the YAML files of other platforms and eventually came across the "-netif:eth" switch. Once I had that integrated, I had a bit of a fight against the QEMU sys
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Immo Birnbaum
· #6793
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ARMv7 Cortex-A port for Xilinx Zynq7000
Hi all, here's my first update on the topic of the Zynq-7000 port, this is the progress so far: - Set up a fresh development VM which now uses the Zephyr SDK, which works fine for the Cortex-A9. - For
Hi all, here's my first update on the topic of the Zynq-7000 port, this is the progress so far: - Set up a fresh development VM which now uses the Zephyr SDK, which works fine for the Cortex-A9. - For
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Immo Birnbaum
· #6789
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ARMv7 Cortex-A port for Xilinx Zynq7000
Hi Henrik, I'll keep you updated. Thanks for the offer regarding the pull request preparation, I'll likely get back to you on that :) Regards, Immo
Hi Henrik, I'll keep you updated. Thanks for the offer regarding the pull request preparation, I'll likely get back to you on that :) Regards, Immo
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Immo Birnbaum
· #6744
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ARMv7 Cortex-A port for Xilinx Zynq7000
Hi Carlo, To my knowledge, the most significant differences are MMU vs. MPU and the newer interrupt controller in the Cortex-R, which expanded the old controller's basic secure/non-secure model into a
Hi Carlo, To my knowledge, the most significant differences are MMU vs. MPU and the newer interrupt controller in the Cortex-R, which expanded the old controller's basic secure/non-secure model into a
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By
Immo Birnbaum
· #6743
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Edited
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ARMv7 Cortex-A port for Xilinx Zynq7000
Hi Carles, thanks for those initial pointers! I'll also keep an eye on what's going on regarding the Cortex-R port besides the ARMv8 Cortex-A port, as Carlo mentioned, the ARMv7 Cortex-A and the Corte
Hi Carles, thanks for those initial pointers! I'll also keep an eye on what's going on regarding the Cortex-R port besides the ARMv8 Cortex-A port, as Carlo mentioned, the ARMv7 Cortex-A and the Corte
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Immo Birnbaum
· #6741
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ARMv7 Cortex-A port for Xilinx Zynq7000
Hi, I've been following the development of Zephyr ever since I attended the Embedded World in Nuremberg back in 2016, and I'd like to thank all those who have contributed to the system's current featu
Hi, I've been following the development of Zephyr ever since I attended the Embedded World in Nuremberg back in 2016, and I'd like to thank all those who have contributed to the system's current featu
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By
Immo Birnbaum
· #6734
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