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Question about the sanitycheck for SMP
There are known issues with SMP and Zephyr's scheduler: https://github.com/zephyrproject-rtos/zephyr/issues/28105 Andrew
There are known issues with SMP and Zephyr's scheduler: https://github.com/zephyrproject-rtos/zephyr/issues/28105 Andrew
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By
Boie, Andrew P
· #7445
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SMP support for RISC-V privilege architecture
Hi Katsuhiro, That is actually a pretty good question. The Risc-V arch port is currently in an "orphaned" state, as noted in MAINTAINERS.yaml. The original contributors have not been heard from for so
Hi Katsuhiro, That is actually a pretty good question. The Risc-V arch port is currently in an "orphaned" state, as noted in MAINTAINERS.yaml. The original contributors have not been heard from for so
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By
Boie, Andrew P
· #7391
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[RFC] SMP support for RISC-V privilege architecture
That PR looks fine. But you definitely will have some work to do to get SMP working on Risc-V, starting with changing the arch to select CONFIG_SWITCH, and then implement arch_start_cpu(), arch_curr_c
That PR looks fine. But you definitely will have some work to do to get SMP working on Risc-V, starting with changing the arch to select CONFIG_SWITCH, and then implement arch_start_cpu(), arch_curr_c
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By
Boie, Andrew P
· #7373
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SMP support for ARM architecture
Hi Krzysztof, I'm assuming that you're referring to ARM Cortex-A? A patch recently landed to implement switch instead of swap: https://github.com/zephyrproject-rtos/zephyr/pull/27766. There is a GitHu
Hi Krzysztof, I'm assuming that you're referring to ARM Cortex-A? A patch recently landed to implement switch instead of swap: https://github.com/zephyrproject-rtos/zephyr/pull/27766. There is a GitHu
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By
Boie, Andrew P
· #7362
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Memory protection and picolibc global state
Hi Keith, Sorry, just saw this. There are some k_mem_partitions defined which can help with this, z_malloc_partition and z_libc_partition. z_malloc_partition is for the malloc() arena, which is global
Hi Keith, Sorry, just saw this. There are some k_mem_partitions defined which can help with this, z_malloc_partition and z_libc_partition. z_malloc_partition is for the malloc() arena, which is global
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By
Boie, Andrew P
· #7342
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Does ISR cause a preemptible thread to be swapped out
Hi George, In Zephyr scheduling, after an ISR is done, can a preemptible thread be swapped out, and a higher priority thread, if ready, is allowed to run? Yes this is guaranteed. There should always b
Hi George, In Zephyr scheduling, after an ISR is done, can a preemptible thread be swapped out, and a higher priority thread, if ready, is allowed to run? Yes this is guaranteed. There should always b
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By
Boie, Andrew P
· #7321
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User Mode Drivers
#driver
Hi Jett, It should certainly be possible to do this, where you implement driver logic as just code which makes other system calls at a lower-level bus abstraction to interact with the hardware. It wou
Hi Jett, It should certainly be possible to do this, where you implement driver logic as just code which makes other system calls at a lower-level bus abstraction to interact with the hardware. It wou
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By
Boie, Andrew P
· #7319
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arm: cortex_r: config_userspace: nested interrupt level is not decremented following syscall
In v2.3 when building with CONFIG_USERSPACE enabled, I see that we do not do a context switch a short time after POR. I've chased this back and found the the cpus[0].nested has incremented to 6, so th
In v2.3 when building with CONFIG_USERSPACE enabled, I see that we do not do a context switch a short time after POR. I've chased this back and found the the cpus[0].nested has incremented to 6, so th
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By
Boie, Andrew P
· #7185
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GH auto-close policy
Hi All, I think we need to re-examine the current policy of auto-closing bugs after 60 days of no activity. I understand the intent, we don't want stale bugs lying around, but I think what we have now
Hi All, I think we need to re-examine the current policy of auto-closing bugs after 60 days of no activity. I understand the intent, we don't want stale bugs lying around, but I think what we have now
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By
Boie, Andrew P
· #7175
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Getting Started Guide
Tommy, when reporting issues, either here or in GitHub, can you copy/paste your terminal output instead of posting screen shots? Andrew
Tommy, when reporting issues, either here or in GitHub, can you copy/paste your terminal output instead of posting screen shots? Andrew
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By
Boie, Andrew P
· #6750
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回复:回复:回复:[Zephyr-devel] is there any gudeline on how to run SMP mode kernel on X86 architecture?
Try this instead, this is what I do every day, I never use west as it doesn’t properly support emulators. For x86-64 the host GDB works great: . zephyr-env.sh cd samples/hello_world mkdir out cd out c
Try this instead, this is what I do every day, I never use west as it doesn’t properly support emulators. For x86-64 the host GDB works great: . zephyr-env.sh cd samples/hello_world mkdir out cd out c
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By
Boie, Andrew P
· #6693
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Use of k_work_submit_to_user_queue() with CONFIG_USERSPACE
This is a bug. I’ll spend some time on this today and get a GH issue opened. Andrew
This is a bug. I’ll spend some time on this today and get a GH issue opened. Andrew
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By
Boie, Andrew P
· #6680
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is there any gudeline on how to run SMP mode kernel on X86 architecture?
The qemu_x86_64 target is configured to use two cores and SMP by default. Regards, Andrew
The qemu_x86_64 target is configured to use two cores and SMP by default. Regards, Andrew
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By
Boie, Andrew P
· #6679
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回复:回复:[Zephyr-devel] Is this a bug? how to guarantee the "atomic semantics access of readyqueue" in "do_swap" function during context switch in SMP mode?
Hi there, Race conditions for SMP are still under investigation. We found one today where the same thread object was being scheduled on two cores. Additional eyes on this (or patches) are greatly valu
Hi there, Race conditions for SMP are still under investigation. We found one today where the same thread object was being scheduled on two cores. Additional eyes on this (or patches) are greatly valu
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By
Boie, Andrew P
· #6676
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about the SMP implement ion, did the zephyr SMP support cpu affinity settings?
See the section on “CPU Mask” for directions on how to constrain threads to run on a particular set of CPUs. https://docs.zephyrproject.org/latest/reference/kernel/smp/smp.html Regards, Andrew
See the section on “CPU Mask” for directions on how to constrain threads to run on a particular set of CPUs. https://docs.zephyrproject.org/latest/reference/kernel/smp/smp.html Regards, Andrew
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By
Boie, Andrew P
· #6657
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ARM Cortex-R user mode -- should system call handlers be running with external interrupts disabled?
Phil, I sent a PR which adds a test for this: https://github.com/zephyrproject-rtos/zephyr/pull/21920 It passes on all the emulated targets we have (including Cortex-M), but if this is broken for your
Phil, I sent a PR which adds a test for this: https://github.com/zephyrproject-rtos/zephyr/pull/21920 It passes on all the emulated targets we have (including Cortex-M), but if this is broken for your
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By
Boie, Andrew P
· #6643
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ARM Cortex-R user mode -- should system call handlers be running with external interrupts disabled?
Interrupts should be unlocked when handling system calls, and indeed a thread in a system call can sleep or be preempted. Sounds like you have found a bug. And a gap in testing, we ought to have a tes
Interrupts should be unlocked when handling system calls, and indeed a thread in a system call can sleep or be preempted. Sounds like you have found a bug. And a gap in testing, we ought to have a tes
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By
Boie, Andrew P
· #6642
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CMSISv2 and CONFIG_USERSPACE
No it is not currently compatible. -Andrew
No it is not currently compatible. -Andrew
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By
Boie, Andrew P
· #6381
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Why the smp version of zephyr kernel "idle" task implent the "k_busy_wait(100)" delay?
There’s an open bug for this: https://github.com/zephyrproject-rtos/zephyr/issues/6157 Andrew
There’s an open bug for this: https://github.com/zephyrproject-rtos/zephyr/issues/6157 Andrew
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By
Boie, Andrew P
· #6143
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Logging with a string via %s
Why must we support high-speed deferred logging of C strings? Really what is this use-case so compelling that we have to leave sharp edges to developers like this? Is there precedent for this in other
Why must we support high-speed deferred logging of C strings? Really what is this use-case so compelling that we have to leave sharp edges to developers like this? Is there precedent for this in other
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By
Boie, Andrew P
· #5987
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