I2C for STM32F3


Daniel Wagenknecht
 

Hi,

 

I’m working on a project that needs I2C functionality on a STM32F0 Chip. Since STM32F0 support is not yet merged into zephyr (I’m observing https://github.com/zephyrproject-rtos/zephyr/pull/4260), I started working with a stm32f3_disco board, which I had available and which uses the same I2C driver (stm32-i2c-v2), with only minor differences (F0 has a combined Event/Error Interrupt, F3 splits both up). I also took a look at the disco_l475_iot1 board for inspiration, because I2C support in Zephyr for this board is implemented and it uses the stm32-i2c-v2 driver as well, but I don’t have one of those boards to test with.

 

Just a little note before I explain the issues I’m running into on the stm32f3_disco: I basically did the same steps on stm32f4_disco board (which uses the stm32-i2c-v1 I2C driver) and got the  I2C bus working there.

I’m confident, that the basic procedure for adding I2C support to a STM32Fx based board is OK, since I got it working on the stm32f4_disco board this way.

 

Back to stm32f3_disco. See attachment for the changes I did to the repo based on zephyr-v1.9.0 release.

I’ve got it compiling with samples/drivers/i2c_fujitsu_fram example with a minor change and an I2C dummy device that acts like the fujitsu-fram (test-setup worked well with stm32f4_disco).

 

diff --git a/samples/drivers/i2c_fujitsu_fram/src/main.c b/samples/drivers/i2c_fujitsu_fram/src/main.c

 

@@ -13,5 +13,1 @@

-#if defined(CONFIG_SOC_QUARK_SE_C1000_SS)

-#define I2C_DEV CONFIG_I2C_SS_0_NAME

-#else

-#define I2C_DEV CONFIG_I2C_0_NAME

-#endif

+#define I2C_DEV "I2C_1"

 

After flashing it onto the stm32f3_disco board the I2C Pins (PB8, PB9) are high with pull-up (like intended), but nothing is happening on the bus. When I single step through  the code with the debugger I loose connection in

file drivers/i2c/i2c_ll_stm32_v2.c

function  msg_init(…)

line 41

 

Last step I can do is out of the LL_I2C_SetSlaveAddr(..) function. The debugger fails with the following message:

 

Error: jtag status contains invalid mode value - communication failure

Polling target stm32f3x.cpu failed, trying to reexamine

Examination failed, GDB will be halted. Polling again in 100ms

 

To reconnect to the board afterwards I need to disconnect it first, reset doesn’t help.

 

So if you know of any changes I missed or did wrong, or are familiar with this type of gdb-errors, please help me out here.

 

Sincerely

 

Daniel Wagenknecht

Softwaredeveloper, R&D

 

 

CLAGE GmbH

Pirolweg 1-5

21337 Lüneburg | Germany

 

Fon: +49 4131 8901-7906

Fax: +49 4131 83200

E-Mail: daniel.wagenknecht@...

www.clage.de

 

 

 

 

 


Yannis Damigos
 



On Thu, Oct 12, 2017 at 3:52 PM, Wagenknecht, Daniel <Daniel.Wagenknecht@...> wrote:

Hi,

 

I’m working on a project that needs I2C functionality on a STM32F0 Chip. Since STM32F0 support is not yet merged into zephyr (I’m observing https://github.com/zephyrproject-rtos/zephyr/pull/4260), I started working with a stm32f3_disco board, which I had available and which uses the same I2C driver (stm32-i2c-v2), with only minor differences (F0 has a combined Event/Error Interrupt, F3 splits both up). I also took a look at the disco_l475_iot1 board for inspiration, because I2C support in Zephyr for this board is implemented and it uses the stm32-i2c-v2 driver as well, but I don’t have one of those boards to test with.

 

Just a little note before I explain the issues I’m running into on the stm32f3_disco: I basically did the same steps on stm32f4_disco board (which uses the stm32-i2c-v1 I2C driver) and got the  I2C bus working there.

I’m confident, that the basic procedure for adding I2C support to a STM32Fx based board is OK, since I got it working on the stm32f4_disco board this way.

 

Back to stm32f3_disco. See attachment for the changes I did to the repo based on zephyr-v1.9.0 release.

I’ve got it compiling with samples/drivers/i2c_fujitsu_fram example with a minor change and an I2C dummy device that acts like the fujitsu-fram (test-setup worked well with stm32f4_disco).

 

diff --git a/samples/drivers/i2c_fujitsu_fram/src/main.c b/samples/drivers/i2c_fujitsu_fram/src/main.c

 

@@ -13,5 +13,1 @@

-#if defined(CONFIG_SOC_QUARK_SE_C1000_SS)

-#define I2C_DEV CONFIG_I2C_SS_0_NAME

-#else

-#define I2C_DEV CONFIG_I2C_0_NAME

-#endif

+#define I2C_DEV "I2C_1"

 

After flashing it onto the stm32f3_disco board the I2C Pins (PB8, PB9) are high with pull-up (like intended), but nothing is happening on the bus. When I single step through  the code with the debugger I loose connection in

file drivers/i2c/i2c_ll_stm32_v2.c

function  msg_init(…)

line 41

 

Last step I can do is out of the LL_I2C_SetSlaveAddr(..) function. The debugger fails with the following message:

 

Error: jtag status contains invalid mode value - communication failure

Polling target stm32f3x.cpu failed, trying to reexamine

Examination failed, GDB will be halted. Polling again in 100ms

 

To reconnect to the board afterwards I need to disconnect it first, reset doesn’t help.

 

So if you know of any changes I missed or did wrong, or are familiar with this type of gdb-errors, please help me out here.

 

Sincerely

 

Daniel Wagenknecht

Softwaredeveloper, R&D

 

 

CLAGE GmbH

Pirolweg 1-5

21337 Lüneburg | Germany

 

Fon: +49 4131 8901-7906

Fax: +49 4131 83200

E-Mail: daniel.wagenknecht@...

www.clage.de

 

 

 

 

 


_______________________________________________
Zephyr-devel mailing list
Zephyr-devel@lists.zephyrproject.org
https://lists.zephyrproject.org/mailman/listinfo/zephyr-devel


Hi Daniel,

I was trying to get I2C working on stm32f3_disco a couple of months ago. You could find my local branch here https://github.com/ydamigos/zephyr/tree/f3disco (it needs a rebase to the master branch).
It just hangs after the line 41 of i2c_ll_stm32_v2.c like yours. It does not output any SYS_LOG on console. Below are the information I managed to collect.

Best regards,
Yannis

openocd debugserver output:
Info : halted: PC: 0x08000b98
Info : halted: PC: 0x08000afc
Info : halted: PC: 0x00000000

gdb output
(gdb) next
41              LL_I2C_SetTransferRequest(i2c, transfer);
(gdb) next
0x00000000 in ?? ()
(gdb) bt --full
No symbol "full" in current context.
(gdb) bt full
#0  0x00000000 in ?? ()
No symbol table info available.
Backtrace stopped: previous frame identical to this frame (corrupt stack?)
(gdb) info frame
Stack level 0, frame at 0x0:
 pc = 0x0; saved pc = <unavailable>
 Outermost frame: previous frame identical to this frame (corrupt stack?)
 Arglist at unknown address.
 Locals at unknown address, Previous frame's sp is 0x0
(gdb) info registers
r0             0x0      0
r1             0x0      0
r2             0x0      0
r3             0x0      0
r4             0x0      0
r5             0x0      0
r6             0x0      0
r7             0x0      0
r8             0x0      0
r9             0x0      0
r10            0x0      0
r11            0x0      0
r12            0x0      0
sp             0x0      0x0
lr             0x0      0
pc             0x0      0x0
xPSR           0x0      0


Erwan Gouriou
 

Hi,

I don't have time to test this yet, but looking into STM32F303 reference manual,
it seems that I2C on F3 is clock independent and hence, we should sepcify clock
before using it.
It seems this case is particular to F3 (at least F303).

Can you have a try defining clock with fowlloing LL function?
  /* Set I2C2 clock source as SYSCLK */
  LL_RCC_SetI2CClockSource(uint32_t I2CxSource);
With I2CxSource:
  *         @arg @ref LL_RCC_I2C1_CLKSOURCE_HSI
  *         @arg @ref LL_RCC_I2C1_CLKSOURCE_SYSCLK
  *         @arg @ref LL_RCC_I2C2_CLKSOURCE_HSI (*)
  *         @arg @ref LL_RCC_I2C2_CLKSOURCE_SYSCLK (*)
  *         @arg @ref LL_RCC_I2C3_CLKSOURCE_HSI (*)
  *         @arg @ref LL_RCC_I2C3_CLKSOURCE_SYSCLK (*)

Erwan


On 12 October 2017 at 15:47, Yannis Damigos <giannis.damigos@...> wrote:


On Thu, Oct 12, 2017 at 3:52 PM, Wagenknecht, Daniel <Daniel.Wagenknecht@...> wrote:

Hi,

 

I’m working on a project that needs I2C functionality on a STM32F0 Chip. Since STM32F0 support is not yet merged into zephyr (I’m observing https://github.com/zephyrproject-rtos/zephyr/pull/4260), I started working with a stm32f3_disco board, which I had available and which uses the same I2C driver (stm32-i2c-v2), with only minor differences (F0 has a combined Event/Error Interrupt, F3 splits both up). I also took a look at the disco_l475_iot1 board for inspiration, because I2C support in Zephyr for this board is implemented and it uses the stm32-i2c-v2 driver as well, but I don’t have one of those boards to test with.

 

Just a little note before I explain the issues I’m running into on the stm32f3_disco: I basically did the same steps on stm32f4_disco board (which uses the stm32-i2c-v1 I2C driver) and got the  I2C bus working there.

I’m confident, that the basic procedure for adding I2C support to a STM32Fx based board is OK, since I got it working on the stm32f4_disco board this way.

 

Back to stm32f3_disco. See attachment for the changes I did to the repo based on zephyr-v1.9.0 release.

I’ve got it compiling with samples/drivers/i2c_fujitsu_fram example with a minor change and an I2C dummy device that acts like the fujitsu-fram (test-setup worked well with stm32f4_disco).

 

diff --git a/samples/drivers/i2c_fujitsu_fram/src/main.c b/samples/drivers/i2c_fujitsu_fram/src/main.c

 

@@ -13,5 +13,1 @@

-#if defined(CONFIG_SOC_QUARK_SE_C1000_SS)

-#define I2C_DEV CONFIG_I2C_SS_0_NAME

-#else

-#define I2C_DEV CONFIG_I2C_0_NAME

-#endif

+#define I2C_DEV "I2C_1"

 

After flashing it onto the stm32f3_disco board the I2C Pins (PB8, PB9) are high with pull-up (like intended), but nothing is happening on the bus. When I single step through  the code with the debugger I loose connection in

file drivers/i2c/i2c_ll_stm32_v2.c

function  msg_init(…)

line 41

 

Last step I can do is out of the LL_I2C_SetSlaveAddr(..) function. The debugger fails with the following message:

 

Error: jtag status contains invalid mode value - communication failure

Polling target stm32f3x.cpu failed, trying to reexamine

Examination failed, GDB will be halted. Polling again in 100ms

 

To reconnect to the board afterwards I need to disconnect it first, reset doesn’t help.

 

So if you know of any changes I missed or did wrong, or are familiar with this type of gdb-errors, please help me out here.

 

Sincerely

 

Daniel Wagenknecht

Softwaredeveloper, R&D

 

 

CLAGE GmbH

Pirolweg 1-5

21337 Lüneburg | Germany

 

Fon: +49 4131 8901-7906

Fax: +49 4131 83200

E-Mail: daniel.wagenknecht@...

www.clage.de

 

 

 

 

 


_______________________________________________
Zephyr-devel mailing list
Zephyr-devel@...ct.org
https://lists.zephyrproject.org/mailman/listinfo/zephyr-devel


Hi Daniel,

I was trying to get I2C working on stm32f3_disco a couple of months ago. You could find my local branch here https://github.com/ydamigos/zephyr/tree/f3disco (it needs a rebase to the master branch).
It just hangs after the line 41 of i2c_ll_stm32_v2.c like yours. It does not output any SYS_LOG on console. Below are the information I managed to collect.

Best regards,
Yannis

openocd debugserver output:
Info : halted: PC: 0x08000b98
Info : halted: PC: 0x08000afc
Info : halted: PC: 0x00000000

gdb output
(gdb) next
41              LL_I2C_SetTransferRequest(i2c, transfer);
(gdb) next
0x00000000 in ?? ()
(gdb) bt --full
No symbol "full" in current context.
(gdb) bt full
#0  0x00000000 in ?? ()
No symbol table info available.
Backtrace stopped: previous frame identical to this frame (corrupt stack?)
(gdb) info frame
Stack level 0, frame at 0x0:
 pc = 0x0; saved pc = <unavailable>
 Outermost frame: previous frame identical to this frame (corrupt stack?)
 Arglist at unknown address.
 Locals at unknown address, Previous frame's sp is 0x0
(gdb) info registers
r0             0x0      0
r1             0x0      0
r2             0x0      0
r3             0x0      0
r4             0x0      0
r5             0x0      0
r6             0x0      0
r7             0x0      0
r8             0x0      0
r9             0x0      0
r10            0x0      0
r11            0x0      0
r12            0x0      0
sp             0x0      0x0
lr             0x0      0
pc             0x0      0x0
xPSR           0x0      0

_______________________________________________
Zephyr-devel mailing list
Zephyr-devel@lists.zephyrproject.org
https://lists.zephyrproject.org/mailman/listinfo/zephyr-devel



Yannis Damigos
 

Thanks Erwan,

It works now. I will create a PR for it

Yannis

On 10/12/2017 06:25 PM, Erwan Gouriou wrote:
Hi,

I don't have time to test this yet, but looking into STM32F303 reference manual,
it seems that I2C on F3 is clock independent and hence, we should sepcify clock
before using it.
It seems this case is particular to F3 (at least F303).

Can you have a try defining clock with fowlloing LL function?
 //* Set I2C2 clock source as SYSCLK */
  LL_RCC_SetI2CClockSource(uint32_t I2CxSource);/
/With //I2CxSource:/
  *         @arg @ref LL_RCC_I2C1_CLKSOURCE_HSI
  *         @arg @ref LL_RCC_I2C1_CLKSOURCE_SYSCLK
  *         @arg @ref LL_RCC_I2C2_CLKSOURCE_HSI (*)
  *         @arg @ref LL_RCC_I2C2_CLKSOURCE_SYSCLK (*)
  *         @arg @ref LL_RCC_I2C3_CLKSOURCE_HSI (*)
  *         @arg @ref LL_RCC_I2C3_CLKSOURCE_SYSCLK (*)

Erwan


On 12 October 2017 at 15:47, Yannis Damigos <giannis.damigos@... <mailto:giannis.damigos@...>> wrote:



On Thu, Oct 12, 2017 at 3:52 PM, Wagenknecht, Daniel <Daniel.Wagenknecht@... <mailto:Daniel.Wagenknecht@...>> wrote:

Hi,____

__ __

I’m working on a project that needs I2C functionality on a STM32F0 Chip. Since STM32F0 support is not yet merged into zephyr (I’m observing https://github.com/zephyrproject-rtos/zephyr/pull/4260 <https://github.com/zephyrproject-rtos/zephyr/pull/4260>), I started working with a stm32f3_disco board, which I had available and which uses the same I2C driver (stm32-i2c-v2), with only minor differences (F0 has a combined Event/Error Interrupt, F3 splits both up). I also took a look at the disco_l475_iot1 board for inspiration, because I2C support in Zephyr for this board is implemented and it uses the stm32-i2c-v2 driver as well, but I don’t have one of those boards to test with.____

__ __

Just a little note before I explain the issues I’m running into on the stm32f3_disco: I basically did the same steps on stm32f4_disco board (which uses the stm32-i2c-v1 I2C driver) and got the  I2C bus working there. ____

I’m confident, that the basic procedure for adding I2C support to a STM32Fx based board is OK, since I got it working on the stm32f4_disco board this way.____

__ __

Back to stm32f3_disco. See attachment for the changes I did to the repo based on zephyr-v1.9.0 release.____

I’ve got it compiling with samples/drivers/i2c_fujitsu_fram example with a minor change and an I2C dummy device that acts like the fujitsu-fram (test-setup worked well with stm32f4_disco).____

__ __

diff --git a/samples/drivers/i2c_fujitsu_fram/src/main.c b/samples/drivers/i2c_fujitsu_fram/src/main.c____

__ __

@@ -13,5 +13,1 @@____

-#if defined(CONFIG_SOC_QUARK_SE_C1000_SS)____

-#define I2C_DEV CONFIG_I2C_SS_0_NAME____

-#else____

-#define I2C_DEV CONFIG_I2C_0_NAME____

-#endif____

+#define I2C_DEV "I2C_1"____

__ __

After flashing it onto the stm32f3_disco board the I2C Pins (PB8, PB9) are high with pull-up (like intended), but nothing is happening on the bus. When I single step through  the code with the debugger I loose connection in ____

file drivers/i2c/i2c_ll_stm32_v2.c____

function  msg_init(…)____

line 41____

__ __

Last step I can do is out of the LL_I2C_SetSlaveAddr(..) function. The debugger fails with the following message:____

__ __

Error: jtag status contains invalid mode value - communication failure____

Polling target stm32f3x.cpu failed, trying to reexamine____

Examination failed, GDB will be halted. Polling again in 100ms____

__ __

To reconnect to the board afterwards I need to disconnect it first, reset doesn’t help.____

__ __

So if you know of any changes I missed or did wrong, or are familiar with this type of gdb-errors, please help me out here.____

__ __

Sincerely____

__ __

*Daniel Wagenknecht**____*

Softwaredeveloper, R&D____

__ __

cid:C4FAA595-4AD0-4C9D-A648-5756BE9EA618____

__ __

*CLAGE GmbH*____

Pirolweg 1-5____

21337 Lüneburg | Germany____

__ __

Fon: +49 4131 8901-7906 <tel:+49%204131%2089017906>____

Fax: +49 4131 83200 <tel:+49%204131%2083200>____

E-Mail: daniel.wagenknecht@... <mailto:daniel.wagenknecht@...>____

www.clage.de <http://www.clage.de>____

__ __

__ __

__ __

__ __

__ __


_______________________________________________
Zephyr-devel mailing list
Zephyr-devel@... <mailto:Zephyr-devel@...>
https://lists.zephyrproject.org/mailman/listinfo/zephyr-devel <https://lists.zephyrproject.org/mailman/listinfo/zephyr-devel>


Hi Daniel,

I was trying to get I2C working on stm32f3_disco a couple of months ago. You could find my local branch here https://github.com/ydamigos/zephyr/tree/f3disco <https://github.com/ydamigos/zephyr/tree/f3disco> (it needs a rebase to the master branch).
It just hangs after the line 41 of i2c_ll_stm32_v2.c like yours. It does not output any SYS_LOG on console. Below are the information I managed to collect.

Best regards,
Yannis

openocd debugserver output:
Info : halted: PC: 0x08000b98
Info : halted: PC: 0x08000afc
Info : halted: PC: 0x00000000

gdb output
(gdb) next
41              LL_I2C_SetTransferRequest(i2c, transfer);
(gdb) next
0x00000000 in ?? ()
(gdb) bt --full
No symbol "full" in current context.
(gdb) bt full
#0  0x00000000 in ?? ()
No symbol table info available.
Backtrace stopped: previous frame identical to this frame (corrupt stack?)
(gdb) info frame
Stack level 0, frame at 0x0:
 pc = 0x0; saved pc = <unavailable>
 Outermost frame: previous frame identical to this frame (corrupt stack?)
 Arglist at unknown address.
 Locals at unknown address, Previous frame's sp is 0x0
(gdb) info registers
r0             0x0      0
r1             0x0      0
r2             0x0      0
r3             0x0      0
r4             0x0      0
r5             0x0      0
r6             0x0      0
r7             0x0      0
r8             0x0      0
r9             0x0      0
r10            0x0      0
r11            0x0      0
r12            0x0      0
sp             0x0      0x0
lr             0x0      0
pc             0x0      0x0
xPSR           0x0      0

_______________________________________________
Zephyr-devel mailing list
Zephyr-devel@... <mailto:Zephyr-devel@...>
https://lists.zephyrproject.org/mailman/listinfo/zephyr-devel <https://lists.zephyrproject.org/mailman/listinfo/zephyr-devel>


Yannis Damigos
 

On 10/12/2017 07:37 PM, Yannis Damigos wrote:
Thanks Erwan,

It works now. I will create a PR for it

Yannis

On 10/12/2017 06:25 PM, Erwan Gouriou wrote:
Hi,

I don't have time to test this yet, but looking into STM32F303 reference manual,
it seems that I2C on F3 is clock independent and hence, we should sepcify clock
before using it.
It seems this case is particular to F3 (at least F303).

Can you have a try defining clock with fowlloing LL function?
 //* Set I2C2 clock source as SYSCLK */
  LL_RCC_SetI2CClockSource(uint32_t I2CxSource);/
/With //I2CxSource:/
  *         @arg @ref LL_RCC_I2C1_CLKSOURCE_HSI
  *         @arg @ref LL_RCC_I2C1_CLKSOURCE_SYSCLK
  *         @arg @ref LL_RCC_I2C2_CLKSOURCE_HSI (*)
  *         @arg @ref LL_RCC_I2C2_CLKSOURCE_SYSCLK (*)
  *         @arg @ref LL_RCC_I2C3_CLKSOURCE_HSI (*)
  *         @arg @ref LL_RCC_I2C3_CLKSOURCE_SYSCLK (*)

Erwan


On 12 October 2017 at 15:47, Yannis Damigos <giannis.damigos@... <mailto:giannis.damigos@...>> wrote:



On Thu, Oct 12, 2017 at 3:52 PM, Wagenknecht, Daniel <Daniel.Wagenknecht@... <mailto:Daniel.Wagenknecht@...>> wrote:

Hi,____

__ __

I’m working on a project that needs I2C functionality on a STM32F0 Chip. Since STM32F0 support is not yet merged into zephyr (I’m observing https://github.com/zephyrproject-rtos/zephyr/pull/4260 <https://github.com/zephyrproject-rtos/zephyr/pull/4260>), I started working with a stm32f3_disco board, which I had available and which uses the same I2C driver (stm32-i2c-v2), with only minor differences (F0 has a combined Event/Error Interrupt, F3 splits both up). I also took a look at the disco_l475_iot1 board for inspiration, because I2C support in Zephyr for this board is implemented and it uses the stm32-i2c-v2 driver as well, but I don’t have one of those boards to test with.____

__ __

Just a little note before I explain the issues I’m running into on the stm32f3_disco: I basically did the same steps on stm32f4_disco board (which uses the stm32-i2c-v1 I2C driver) and got the  I2C bus working there. ____

I’m confident, that the basic procedure for adding I2C support to a STM32Fx based board is OK, since I got it working on the stm32f4_disco board this way.____

__ __

Back to stm32f3_disco. See attachment for the changes I did to the repo based on zephyr-v1.9.0 release.____

I’ve got it compiling with samples/drivers/i2c_fujitsu_fram example with a minor change and an I2C dummy device that acts like the fujitsu-fram (test-setup worked well with stm32f4_disco).____

__ __

diff --git a/samples/drivers/i2c_fujitsu_fram/src/main.c b/samples/drivers/i2c_fujitsu_fram/src/main.c____

__ __

@@ -13,5 +13,1 @@____

-#if defined(CONFIG_SOC_QUARK_SE_C1000_SS)____

-#define I2C_DEV CONFIG_I2C_SS_0_NAME____

-#else____

-#define I2C_DEV CONFIG_I2C_0_NAME____

-#endif____

+#define I2C_DEV "I2C_1"____

__ __

After flashing it onto the stm32f3_disco board the I2C Pins (PB8, PB9) are high with pull-up (like intended), but nothing is happening on the bus. When I single step through  the code with the debugger I loose connection in ____

file drivers/i2c/i2c_ll_stm32_v2.c____

function  msg_init(…)____

line 41____

__ __

Last step I can do is out of the LL_I2C_SetSlaveAddr(..) function. The debugger fails with the following message:____

__ __

Error: jtag status contains invalid mode value - communication failure____

Polling target stm32f3x.cpu failed, trying to reexamine____

Examination failed, GDB will be halted. Polling again in 100ms____

__ __

To reconnect to the board afterwards I need to disconnect it first, reset doesn’t help.____

__ __

So if you know of any changes I missed or did wrong, or are familiar with this type of gdb-errors, please help me out here.____

__ __

Sincerely____

__ __

*Daniel Wagenknecht**____*

Softwaredeveloper, R&D____

__ __

cid:C4FAA595-4AD0-4C9D-A648-5756BE9EA618____

__ __

*CLAGE GmbH*____

Pirolweg 1-5____

21337 Lüneburg | Germany____

__ __

Fon: +49 4131 8901-7906 <tel:+49%204131%2089017906>____

Fax: +49 4131 83200 <tel:+49%204131%2083200>____

E-Mail: daniel.wagenknecht@... <mailto:daniel.wagenknecht@...>____

www.clage.de <http://www.clage.de>____

__ __

__ __

__ __

__ __

__ __


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Hi Daniel,

I was trying to get I2C working on stm32f3_disco a couple of months ago. You could find my local branch here https://github.com/ydamigos/zephyr/tree/f3disco <https://github.com/ydamigos/zephyr/tree/f3disco> (it needs a rebase to the master branch).
It just hangs after the line 41 of i2c_ll_stm32_v2.c like yours. It does not output any SYS_LOG on console. Below are the information I managed to collect.

Best regards,
Yannis

openocd debugserver output:
Info : halted: PC: 0x08000b98
Info : halted: PC: 0x08000afc
Info : halted: PC: 0x00000000

gdb output
(gdb) next
41              LL_I2C_SetTransferRequest(i2c, transfer);
(gdb) next
0x00000000 in ?? ()
(gdb) bt --full
No symbol "full" in current context.
(gdb) bt full
#0  0x00000000 in ?? ()
No symbol table info available.
Backtrace stopped: previous frame identical to this frame (corrupt stack?)
(gdb) info frame
Stack level 0, frame at 0x0:
 pc = 0x0; saved pc = <unavailable>
 Outermost frame: previous frame identical to this frame (corrupt stack?)
 Arglist at unknown address.
 Locals at unknown address, Previous frame's sp is 0x0
(gdb) info registers
r0             0x0      0
r1             0x0      0
r2             0x0      0
r3             0x0      0
r4             0x0      0
r5             0x0      0
r6             0x0      0
r7             0x0      0
r8             0x0      0
r9             0x0      0
r10            0x0      0
r11            0x0      0
r12            0x0      0
sp             0x0      0x0
lr             0x0      0
pc             0x0      0x0
xPSR           0x0      0

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