STM32/STM32F1 patchset v13

Maciek Borzecki <maciek.borzecki@...>


I have posted version 13 of the patchset. As usual the series is
avaialable in my github repo in
branch bboozzoo/stm32f10x-for-upstream-v13.


- addressed cosmetic comments

- updated pinmux driver to use struct pin_config instead of a custom

- added support for HSE (high speed external oscillator) as clock
input for PLL or directly for SYSCLK, this allows for using much
higher SYSCLK values, up to 72MHz

- added register mapping for embedded flash controller; this change is
required by HSE and higher SYSCLK support, as flash access latency
needs to be configured for higher values of system clock

- svc_handler unaligned access fix; I would like to ask ARM experts to
look at this change, by no means I consider myself such expert. The
problem was identified when running latency benchmarks. The
benchmarks enable IRQ offloading, what enables previously unused
code paths in svc_handler. When the code attempts to access svc
parameter (which is not 4 byte aligned), unaligned access exception

New Changes: soc/stm32f1: add embedded
flash registers mapping clock_control/stm32f1: HSE
support and PLL configuration cleanup arm: access svc instruction
using halfword load in svc_handler

Updated Changes: pinmux/stm32: add common
driver for STM32 pinmux serial/stm32: add driver for
STM32 UART gpio/stm32: add common driver
for STM32 GPIO boards/stm32_mini_a15: add
new board samples/drivers/disco: add
'disco' sample program soc/stm32f1/gpio: implement
GPIO support soc/stm32f1/pinmux: implement
STM32 pinmux integration boards/nucleo_f103rb: add new
board soc/stm32f1: add IRQ numbers
listing serial/stm32: add support for
interupt_controller/stm32_exti: driver for STM32 EXTI controller gpio/stm32: GPIO input with
interrupts soc/stm32f1: AFIO registers
mapping soc/stm32f1/gpio: implement
MCU specific GPIO input interrupt integration watchdog/iwdg_stm32: add
driver for STM32 Independent Watchdog (IWDG) samples/button: button input

Maciek Borzecki