Increasing bss section in Zephyr


Mahendravarman Rajarao (RBEI/EAA3) <Mahendravarman.Rajarao@...>
 

Hi All

How to Increase the .bss section in Zephyr ?

There is a requirement for my project to have a big size array for 15K
If I declare and compile , getting error as

.bss will not fit in region RAM
Region 'RAM' overflowed by 20160 bytes

Any help on this regard is welcome !!

Mahendra


Gustavo Lima Chaves <gustavo.lima.chaves@...>
 

* Mahendravarman Rajarao (RBEI/EAA3) <Mahendravarman.Rajarao(a)in.bosch.com> [2016-09-05 18:27:04 +0000]:

Hi All

How to Increase the .bss section in Zephyr ?

There is a requirement for my project to have a big size array for 15K
If I declare and compile , getting error as

.bss will not fit in region RAM
Region 'RAM' overflowed by 20160 bytes

Any help on this regard is welcome !!

Mahendra
Have you taken a look at CONFIG_RAM_SIZE and friends? Last time I
dealt with it these were the options I changed.

Regards,

--
Gustavo Lima Chaves
Intel - Open Source Technology Center


Mahendravarman Rajarao (RBEI/EAA3) <Mahendravarman.Rajarao@...>
 

Hi

Thanks for replying
Please help on the following query

If The CONFIG_RAM_SIZE - denotes the internal RAM of controller means, Iam using Atlas peak controller of 80KB SRAM.
Even If I declare CONFIG_RAM_SIZE = 85 in prj.conf file in my project
Zephyr.bin is getting generated


Please clarify

Thanks
Mahendra

-----Original Message-----
From: Gustavo Lima Chaves [mailto:gustavo.lima.chaves(a)intel.com]
Sent: Tuesday, September 06, 2016 6:54 PM
To: Mahendravarman Rajarao (RBEI/EAA3) <Mahendravarman.Rajarao(a)in.bosch.com>
Cc: devel(a)lists.zephyrproject.org
Subject: Re: [devel] Increasing bss section in Zephyr

* Mahendravarman Rajarao (RBEI/EAA3) <Mahendravarman.Rajarao(a)in.bosch.com> [2016-09-05 18:27:04 +0000]:

Hi All

How to Increase the .bss section in Zephyr ?

There is a requirement for my project to have a big size array for 15K
If I declare and compile , getting error as

.bss will not fit in region RAM
Region 'RAM' overflowed by 20160 bytes

Any help on this regard is welcome !!

Mahendra
Have you taken a look at CONFIG_RAM_SIZE and friends? Last time I dealt with it these were the options I changed.

Regards,

--
Gustavo Lima Chaves
Intel - Open Source Technology Center


Andy Ross
 

Mahendravarman Rajarao (RBEI/EAA3) wrote:
If The CONFIG_RAM_SIZE - denotes the internal RAM of controller means,
Iam using Atlas peak controller of 80KB SRAM. Even If I declare
CONFIG_RAM_SIZE = 85 in prj.conf file in my project Zephyr.bin is
getting generated
That just means there's no per-SoC checking of linker memory regions.
Clearly there should be, but obviously that doesn't mean that such a
file is going to execute successfully.

You can check how these are used in arch/x86/soc/quark_se/linker.ld if
you're curious. The linker just emits the sections in the RAM memory
region at CONFIG_PHYS_RAM_ADDR and assumes it can use up to
CONFIG_RAM_SIZE kb.

Andy


Boie, Andrew P
 

Typically the RAM region is defined to be the size of the available RAM on the target board.

You are in one of two scenarios:

- The size of RAM defined by the build is too small, there is actually more RAM available, and the board configuration needs to be updated to the true size

- You need more .bss than there is available RAM on the device, in which case you need to conserve RAM elsewhere or use a different board.

Unfortunately, the latter is the most likely.
What board is this?
If Arduino 101, RAM between ARC and x86 side is shared with different regions for each. The default is 55K for x86 and 24K for ARC, with 1K of shared space. 80K total available. If you don't need the ARC you could claim its ram on the x86 side.

Andrew

From: Mahendravarman Rajarao (RBEI/EAA3) [mailto:Mahendravarman.Rajarao(a)in.bosch.com]
Sent: Monday, September 5, 2016 11:27 AM
To: devel(a)lists.zephyrproject.org
Subject: [devel] Increasing bss section in Zephyr

Hi All

How to Increase the .bss section in Zephyr ?

There is a requirement for my project to have a big size array for 15K
If I declare and compile , getting error as

.bss will not fit in region RAM
Region 'RAM' overflowed by 20160 bytes

Any help on this regard is welcome !!

Mahendra


Sukumar Ghorai
 

I was checking ROM and RAM size in arduino_101:
CONFIG_XIP=y
CONFIG_PHYS_LOAD_ADDR=0x40030000
CONFIG_PHYS_RAM_ADDR =0xA8006400
CONFIG_RAM_SIZE=55
CONFIG_ROM_SIZE=144

Why load-address(0x40030000) is lower compare to ram-address (0xA8006400)?

~Sukumar

On Tue, Sep 6, 2016 at 9:39 PM, Boie, Andrew P <andrew.p.boie(a)intel.com> wrote:
Typically the RAM region is defined to be the size of the available RAM on
the target board.



You are in one of two scenarios:

- The size of RAM defined by the build is too small, there is
actually more RAM available, and the board configuration needs to be updated
to the true size

- You need more .bss than there is available RAM on the device, in
which case you need to conserve RAM elsewhere or use a different board.



Unfortunately, the latter is the most likely.

What board is this?

If Arduino 101, RAM between ARC and x86 side is shared with different
regions for each. The default is 55K for x86 and 24K for ARC, with 1K of
shared space. 80K total available. If you don’t need the ARC you could claim
its ram on the x86 side.



Andrew



From: Mahendravarman Rajarao (RBEI/EAA3)
[mailto:Mahendravarman.Rajarao(a)in.bosch.com]
Sent: Monday, September 5, 2016 11:27 AM
To: devel(a)lists.zephyrproject.org
Subject: [devel] Increasing bss section in Zephyr



Hi All



How to Increase the .bss section in Zephyr ?



There is a requirement for my project to have a big size array for 15K

If I declare and compile , getting error as



.bss will not fit in region RAM

Region ‘RAM’ overflowed by 20160 bytes



Any help on this regard is welcome !!



Mahendra


Andy Ross
 

Sukumar Ghorai wrote:
I was checking ROM and RAM size in arduino_101:
CONFIG_XIP=y
CONFIG_PHYS_LOAD_ADDR=0x40030000
CONFIG_PHYS_RAM_ADDR =0xA8006400
CONFIG_RAM_SIZE=55
CONFIG_ROM_SIZE=144

Why load-address(0x40030000) is lower compare to ram-address (0xA8006400)?
PHYS_LOAD_ADDR is where the code (and rodata, etc...) goes. Quark SE
is an execute-in-place architecture, so that address is mapped
directly to the flash space on the chip, there is no step where the
code gets "copied into memory" as there is on bigger machines.

As far as why flash is mapped lower than RAM, that's just an arbitrary
choice by the hardware designers.

Andy


Sukumar Ghorai
 

Thx. load-address(0x40030000) is the Flash Address.. and i missed it... :(

~Sukumar

On Wed, Sep 7, 2016 at 8:56 PM, Andy Ross <andrew.j.ross(a)intel.com> wrote:
Sukumar Ghorai wrote:
I was checking ROM and RAM size in arduino_101:
CONFIG_XIP=y
CONFIG_PHYS_LOAD_ADDR=0x40030000
CONFIG_PHYS_RAM_ADDR =0xA8006400
CONFIG_RAM_SIZE=55
CONFIG_ROM_SIZE=144

Why load-address(0x40030000) is lower compare to ram-address (0xA8006400)?
PHYS_LOAD_ADDR is where the code (and rodata, etc...) goes. Quark SE
is an execute-in-place architecture, so that address is mapped
directly to the flash space on the chip, there is no step where the
code gets "copied into memory" as there is on bigger machines.

As far as why flash is mapped lower than RAM, that's just an arbitrary
choice by the hardware designers.

Andy