STM32-Nucleo-F411RE SPI1 NSS pin pull-up



I'm using the SPI1 bus in master mode on a STM32-Nucleo-F411RE board with the following small app:

Things work fine, except I had to spend quite a lot of time to figure out why the NSS (chip select) line didn't work when using it in the hardware controlled mode (the HW asserts it whenever it transmits). The problem turned out to be that there wasn't either an internal or an external pull up resistor on the line (since I was only measuring it with a scope and there isn't any internal pull-up/down configured for the pin by Zephyr). So the line stayed effectively always in the low (asserted) state.

Configuring an internal pull-up for the pin solved the issue, according to the following patch:

However I'm wondering if this is the right solution, since someone may want to install an external pull-up resistor instead and not configure any internal one. OTOH, for someone less experienced with SPI/Zephyr like me the seemingly disfunctional NSS line can be rather perplexing, so maybe the pin should still default to have a pull-up.

As a side-note after reset the pin is in the alternate function 0 mode (Jtag JTDI) and has a pull-up configured for it.
EDIT: The above is a red herring, the PA4 pin - which is what Zephyr uses for SPI1-NSS, and which the patch above changes - is in floating-input mode after reset, so there is no pull-up on it. I mixed it up with PA15, which has pull-up on it after reset (and which could be also used in the SPI1-NSS alternate function mode). My question still holds though about the ideal default state for PA4.

Any suggestions what the default should be?