Topics

Development Issue on LPC55S69

Vince Wu (吳家瑋) <Vince.Wu@...>
 

Hi,

 

We have some issues on developing LPC55S69 based on Zephyr OS.

 

1.      EVB can’t run FW successfully if I do operation for double type variable.

I found the FW with this problem will link some more libraries as follows, maybe it cause the problem.

 

2.      The voltage of MOSI signal for SPI interface in idle state is unstable.

The following 4 situations happen:

1.      Start from high voltage and end with high voltage

2.      Start from high voltage and end with low voltage

3.      Start from low voltage and end with high voltage

4.      Start from low voltage and end with high voltage

For example:

 

3.      No counter driver.

If I open the counter drivers option in menuconfig, it will build fail.

4.      Bug in GPIO driver, gpio_mcux_lpc.c.

Original source will assign incorrect ISR for the assigned pin.

 

Please help to answer these problems, thanks.

 

Best regards,

 

Vince Wu

Project Lead

Moxa Connectivity Project Development

Fl. 4, No. 135, Lane 235, Baoqiao Rd.

Xindian Dist., New Taipei City, Taiwan, R.O.C.

Tel : +886-2-89191230 ext.1187

vince.wu@...

Moxa_Logo_2013.jpg
This email and any attached files may contain confidential and/or privileged information. If you are not the intended recipient (or have received this e-mail in error) please notify the sender immediately and destroy this email. Any unauthorized duplication, utilization, disclosure, or distribution of the material in this email and its attached files is strictly forbidden.

 

Lawrence King
 

Hi Vince:

 

2) I am not sure what you mean when you say “the voltage on the MOSI signal is unstable”. The Oscilloscope traces below look fine, however, the probes on your oscilloscope have not been properly compensated hence you see the ‘tilt’ on the signals instead of nice square waves. Take a look at this article to understand why and how to compensate your probes. https://www.circuitspecialists.com/blog/oscilloscope-probe-compensation-adjustment/

 

Lawrence King

Principal Developer

+1(416)627-7302

 

From: devel@... <devel@...> On Behalf Of Vince Wu (???)
Sent: Monday, March 30, 2020 12:46 AM
To: devel@...
Cc: Kevin Chu (
朱國偉) <Kevin.Chu@...>; Clone KL Liao (廖崑霳) <CloneKL.Liao@...>; Wu, Hubert <Hubert.Wu@...>
Subject: [Zephyr-devel] Development Issue on LPC55S69

 

Hi,

 

We have some issues on developing LPC55S69 based on Zephyr OS.

 

  1. EVB can’t run FW successfully if I do operation for double type variable.

I found the FW with this problem will link some more libraries as follows, maybe it cause the problem.

 

  1. The voltage of MOSI signal for SPI interface in idle state is unstable.

The following 4 situations happen:

  1. Start from high voltage and end with high voltage
  2. Start from high voltage and end with low voltage
  3. Start from low voltage and end with high voltage
  4. Start from low voltage and end with high voltage

For example:

 

  1. No counter driver.

If I open the counter drivers option in menuconfig, it will build fail.

  1. Bug in GPIO driver, gpio_mcux_lpc.c.

Original source will assign incorrect ISR for the assigned pin.

 

Please help to answer these problems, thanks.

 

Best regards,

 

Vince Wu

Project Lead

Moxa Connectivity Project Development

Fl. 4, No. 135, Lane 235, Baoqiao Rd.

Xindian Dist., New Taipei City, Taiwan, R.O.C.

Tel : +886-2-89191230 ext.1187

vince.wu@...

Moxa_Logo_2013.jpg
This email and any attached files may contain confidential and/or privileged information. If you are not the intended recipient (or have received this e-mail in error) please notify the sender immediately and destroy this email. Any unauthorized duplication, utilization, disclosure, or distribution of the material in this email and its attached files is strictly forbidden.

 

Vince Wu (吳家瑋) <Vince.Wu@...>
 

Hi Lawrence,

 

Sorry for unclear description.

What I mean is the voltage of MOSI signal in idle state doesn’t remain in high voltage.

For example, the following picture shows it begin from high voltage but end with low voltage.

However, I think the correct behavior is that MOSI should go back to high voltage after data transmission is finished.

 

Is this normal?

Thanks.

 

Best regards,

Vince

 

From: Lawrence King [mailto:lawrence.king@...]
Sent: Monday, March 30, 2020 9:30 PM
To: Vince Wu (
吳家瑋) <Vince.Wu@...>; devel@...
Cc: Kevin Chu (
朱國偉) <Kevin.Chu@...>; Clone KL Liao (廖崑霳) <CloneKL.Liao@...>; Wu, Hubert <Hubert.Wu@...>
Subject: RE: [Zephyr-devel] Development Issue on LPC55S69

 

Hi Vince:

 

2) I am not sure what you mean when you say “the voltage on the MOSI signal is unstable”. The Oscilloscope traces below look fine, however, the probes on your oscilloscope have not been properly compensated hence you see the ‘tilt’ on the signals instead of nice square waves. Take a look at this article to understand why and how to compensate your probes. https://www.circuitspecialists.com/blog/oscilloscope-probe-compensation-adjustment/

 

Lawrence King

Principal Developer

+1(416)627-7302

 

From: devel@... <devel@...> On Behalf Of Vince Wu (???)
Sent: Monday, March 30, 2020 12:46 AM
To: devel@...
Cc: Kevin Chu (
朱國偉) <Kevin.Chu@...>; Clone KL Liao (廖崑霳) <CloneKL.Liao@...>; Wu, Hubert <Hubert.Wu@...>
Subject: [Zephyr-devel] Development Issue on LPC55S69

 

Hi,

 

We have some issues on developing LPC55S69 based on Zephyr OS.

 

1.      EVB can’t run FW successfully if I do operation for double type variable.

I found the FW with this problem will link some more libraries as follows, maybe it cause the problem.

 

2.      The voltage of MOSI signal for SPI interface in idle state is unstable.

The following 4 situations happen:

  1. Start from high voltage and end with high voltage
  2. Start from high voltage and end with low voltage
  3. Start from low voltage and end with high voltage
  4. Start from low voltage and end with high voltage

For example:

 

3.      No counter driver.

If I open the counter drivers option in menuconfig, it will build fail.

4.      Bug in GPIO driver, gpio_mcux_lpc.c.

Original source will assign incorrect ISR for the assigned pin.

 

Please help to answer these problems, thanks.

 

Best regards,

 

Vince Wu

Project Lead

Moxa Connectivity Project Development

Fl. 4, No. 135, Lane 235, Baoqiao Rd.

Xindian Dist., New Taipei City, Taiwan, R.O.C.

Tel : +886-2-89191230 ext.1187

vince.wu@...

Moxa_Logo_2013.jpg
This email and any attached files may contain confidential and/or privileged information. If you are not the intended recipient (or have received this e-mail in error) please notify the sender immediately and destroy this email. Any unauthorized duplication, utilization, disclosure, or distribution of the material in this email and its attached files is strictly forbidden.

 

Lawrence King
 

HI Vince,

 

There is no ‘official’ SPI specification, it is a defacto standard, and chip manufacturers can implement it any way they want. Generally most peripherals don’t care what level the data pin is at when the SSEL signal is not active. Your traces don’t show the SSEL signal but I would expect it is high except when transferring data.

 

If you look at the datasheet for the LPC55S69 https://www.nxp.com/docs/en/data-sheet/LPC55S6x.pdf on page 89 of 128 you can see the SPI timing diagram. As you can see the MOSI signal can be either high or low during the IDLE time. Hence, I would say that what you are seeing is exactly what is expected. Why did you expect MOSI to be at a fixed level between transactions?

 

 

If you really need MOSI to be high (or low) during the idle time then I suspect that you will need to modify the diver, and change the MOSI from SPI to GPIO at the end of the transaction and programmatically drive the GPIO high (or low).

 

I also found an interesting article about an NXP SPI interface and analysis of which state MOSI ended up in after each transaction. I suspect you can work out the rules for the LPC55S69 by trying the same experiments. https://michaeltien8901.github.io/stm32/2019/01/06/STM32F072-MOSI-Idle-State.html

 

Sorry I can’t help you with the other issues in this thread.

 

Lawrence King

Principal Developer

+1(416)627-7302

 

From: Vince Wu (吳家瑋) <Vince.Wu@...>
Sent: Tuesday, March 31, 2020 3:10 AM
To: Lawrence King <lawrence.king@...>; devel@...
Cc: Kevin Chu (
朱國偉) <Kevin.Chu@...>; Clone KL Liao (廖崑霳) <CloneKL.Liao@...>; Wu, Hubert <Hubert.Wu@...>
Subject: RE: [Zephyr-devel] Development Issue on LPC55S69

 

Hi Lawrence,

 

Sorry for unclear description.

What I mean is the voltage of MOSI signal in idle state doesn’t remain in high voltage.

For example, the following picture shows it begin from high voltage but end with low voltage.

However, I think the correct behavior is that MOSI should go back to high voltage after data transmission is finished.

 

Is this normal?

Thanks.

 

Best regards,

Vince

 

From: Lawrence King [mailto:lawrence.king@...]
Sent: Monday, March 30, 2020 9:30 PM
To: Vince Wu (
吳家瑋) <Vince.Wu@...>; devel@...
Cc: Kevin Chu (
朱國偉) <Kevin.Chu@...>; Clone KL Liao (廖崑霳) <CloneKL.Liao@...>; Wu, Hubert <Hubert.Wu@...>
Subject: RE: [Zephyr-devel] Development Issue on LPC55S69

 

Hi Vince:

 

2) I am not sure what you mean when you say “the voltage on the MOSI signal is unstable”. The Oscilloscope traces below look fine, however, the probes on your oscilloscope have not been properly compensated hence you see the ‘tilt’ on the signals instead of nice square waves. Take a look at this article to understand why and how to compensate your probes. https://www.circuitspecialists.com/blog/oscilloscope-probe-compensation-adjustment/

 

Lawrence King

Principal Developer

+1(416)627-7302

 

From: devel@... <devel@...> On Behalf Of Vince Wu (???)
Sent: Monday, March 30, 2020 12:46 AM
To: devel@...
Cc: Kevin Chu (
朱國偉) <Kevin.Chu@...>; Clone KL Liao (廖崑霳) <CloneKL.Liao@...>; Wu, Hubert <Hubert.Wu@...>
Subject: [Zephyr-devel] Development Issue on LPC55S69

 

Hi,

 

We have some issues on developing LPC55S69 based on Zephyr OS.

 

  1. EVB can’t run FW successfully if I do operation for double type variable.

I found the FW with this problem will link some more libraries as follows, maybe it cause the problem.

 

  1. The voltage of MOSI signal for SPI interface in idle state is unstable.

The following 4 situations happen:

  1. Start from high voltage and end with high voltage
  2. Start from high voltage and end with low voltage
  3. Start from low voltage and end with high voltage
  4. Start from low voltage and end with high voltage

For example:

 

  1. No counter driver.

If I open the counter drivers option in menuconfig, it will build fail.

  1. Bug in GPIO driver, gpio_mcux_lpc.c.

Original source will assign incorrect ISR for the assigned pin.

 

Please help to answer these problems, thanks.

 

Best regards,

 

Vince Wu

Project Lead

Moxa Connectivity Project Development

Fl. 4, No. 135, Lane 235, Baoqiao Rd.

Xindian Dist., New Taipei City, Taiwan, R.O.C.

Tel : +886-2-89191230 ext.1187

vince.wu@...

Moxa_Logo_2013.jpg
This email and any attached files may contain confidential and/or privileged information. If you are not the intended recipient (or have received this e-mail in error) please notify the sender immediately and destroy this email. Any unauthorized duplication, utilization, disclosure, or distribution of the material in this email and its attached files is strictly forbidden.