SMP support for RISC-V based Microchip PolarFire SoC Icicle Kit


conor.paxton@...
 

Hi there,

We have been working on a port of zephyr for the Microchip PolarFire SoC Icicle Kit, focusing on SMP support. It is very much in initial stages, however,
we have tested it on our hardware using the smp/pi application and have had good results.
We would now like to put it out there, to see if we could get some feedback. We are on an older version of the zephyr code base (2.4.99), which we plan on updating
to the latest release in the coming weeks.

You can find the source our code here:
https://github.com/polarfire-soc/zephyr/tree/mpfs-zephyr

And information about the PolarFire SoC and Icicle Kit here:
https://github.com/polarfire-soc/zephyr/tree/mpfs-zephyr


Kind Regards,

Conor Paxton

conor.paxton@...
petermcshane@...


pzierhoffer@...
 

Hi Conor

We have tried to run it in Renode and everything worked as expected!
We checked the smp/pi sample and some other basic apps like hello-world or synchronization.

We'd be happy to review it when you bump your branch on top of the latest codebase and submit the PR!

Best regards

Piotr Zierhoffer
Antmicro


On Thu, Oct 7, 2021 at 3:24 PM conor.paxton via lists.zephyrproject.org <conor.paxton=microchip.com@...> wrote:
Hi there,

We have been working on a port of zephyr for the Microchip PolarFire SoC Icicle Kit, focusing on SMP support. It is very much in initial stages, however,
we have tested it on our hardware using the smp/pi application and have had good results.
We would now like to put it out there, to see if we could get some feedback. We are on an older version of the zephyr code base (2.4.99), which we plan on updating
to the latest release in the coming weeks.

You can find the source our code here:
https://github.com/polarfire-soc/zephyr/tree/mpfs-zephyr

And information about the PolarFire SoC and Icicle Kit here:
https://github.com/polarfire-soc/zephyr/tree/mpfs-zephyr


Kind Regards,

Conor Paxton

conor.paxton@...
petermcshane@...



--
Piotr Zierhoffer
mobile: +48 696 419 606
Antmicro Ltd | www.antmicro.com
Zwierzyniecka 3, 60-813 Poznan, Poland


Nashif, Anas
 

Conor,

Thank you for sharing, this is great.

Just a quick comment, from a quick look at the links below, I noticed the arch changes to riscv adding smp support and other generic code references your SOC and hardware, this need to be made generic and vendor/soc agnostic before you submit to the zephyr tree.

 

Thanks,

Anas

 

From: <devel@...> on behalf of "conor.paxton via lists.zephyrproject.org" <conor.paxton=microchip.com@...>
Reply-To: "conor.paxton@..." <conor.paxton@...>
Date: Thursday, October 7, 2021 at 9:24 AM
To: "devel@..." <devel@...>
Subject: [Zephyr-devel] SMP support for RISC-V based Microchip PolarFire SoC Icicle Kit

 

Hi there,

We have been working on a port of zephyr for the Microchip PolarFire SoC Icicle Kit, focusing on SMP support. It is very much in initial stages, however,
we have tested it on our hardware using the smp/pi application and have had good results.
We would now like to put it out there, to see if we could get some feedback. We are on an older version of the zephyr code base (2.4.99), which we plan on updating
to the latest release in the coming weeks.

You can find the source our code here:
https://github.com/polarfire-soc/zephyr/tree/mpfs-zephyr

And information about the PolarFire SoC and Icicle Kit here:
https://github.com/polarfire-soc/zephyr/tree/mpfs-zephyr


Kind Regards,

Conor Paxton

conor.paxton@...
petermcshane@...


Olof Johansson
 

I believe qemu also has models for the SMP SiFive models (which, I'd
expect, have a very similar CPU complex to the PolarFire). Making sure
that the port works there to enable a broader set of developers to run
tests on it would be a great venue for making the SMP support generic
per Anas' request.

Super excited to see this enabled!


-Olof

On Thu, Oct 7, 2021 at 7:28 AM Nashif, Anas <anas.nashif@intel.com> wrote:

Conor,

Thank you for sharing, this is great.

Just a quick comment, from a quick look at the links below, I noticed the arch changes to riscv adding smp support and other generic code references your SOC and hardware, this need to be made generic and vendor/soc agnostic before you submit to the zephyr tree.



Thanks,

Anas



From: <devel@lists.zephyrproject.org> on behalf of "conor.paxton via lists.zephyrproject.org" <conor.paxton=microchip.com@lists.zephyrproject.org>
Reply-To: "conor.paxton@microchip.com" <conor.paxton@microchip.com>
Date: Thursday, October 7, 2021 at 9:24 AM
To: "devel@lists.zephyrproject.org" <devel@lists.zephyrproject.org>
Subject: [Zephyr-devel] SMP support for RISC-V based Microchip PolarFire SoC Icicle Kit



Hi there,

We have been working on a port of zephyr for the Microchip PolarFire SoC Icicle Kit, focusing on SMP support. It is very much in initial stages, however,
we have tested it on our hardware using the smp/pi application and have had good results.
We would now like to put it out there, to see if we could get some feedback. We are on an older version of the zephyr code base (2.4.99), which we plan on updating
to the latest release in the coming weeks.

You can find the source our code here:
https://github.com/polarfire-soc/zephyr/tree/mpfs-zephyr

And information about the PolarFire SoC and Icicle Kit here:
https://github.com/polarfire-soc/zephyr/tree/mpfs-zephyr


Kind Regards,

Conor Paxton

conor.paxton@microchip.com
petermcshane@microchip.com


conor.paxton@...
 

Hi There,

Thanks to everyone for the feedback thus far, it is really appreciated. Our plan is to modify the code that affects the arch/riscv for smp support so that it is generic/agnostic. We will also work on getting the port working on Qemu with the provided models. Also, it really great to hear that the port worked in Renode! this is a serious advantage for us.

I will report back here, as we make progress.

Kind Regards,

Conor

conor.paxton@...
petermcshane@...