Re: I2c problem on 96b Carbon.

Yannis Damigos


On Fri, Aug 4, 2017 at 12:27 AM, Iñaki Malerba <inakimmalerba@...> wrote:
Hi everyone!

I've been struggling with this problem for the last weeks. I cannot make it
to comunicate my carbon board with an fxos8700 IMU.

Enabling the interruptions mode on the i2c driver, I can see on the logic
analyzer it sends the address of the byte to read, but it doesnt receives
the answer.
I tried my best to debug it with gdb and I get to the point where it gets
looped on `handle_rxne` (drivers/i2c/i2c_ll_stm32_v1.c) with `data.len = 0`.

I also have some doubts about some lines there. For example, how does it ack
the message if it enters the first `if` with `data.len = 1` and then, when
decreased, `data.len == 1` its false.
You are right, the first `if` with `data.len = 1` should be nack and
not ack (probably I made a typo during driver development). In case a
single byte has to be received, the Acknowledge disable is made before
ADDR flag is cleared.

Could you test the I2C read both in polling and interrupt mode with
the following branch? I only have a slave I2C display which supports
only write operations and I cannot test it myself.

If everything works fine, I will create a PR to fix it.

It doesnt generate the stop bit either because the burst read sets
Why does `i2c_reg_read_byte` uses burst read instead of normal read?

Any help on this would be really apreciated, Im really stuck on here.
Martin Iñaki Malerba
inakimmalerba@... | +54 02945 15468443

Zephyr-users mailing list

Join to automatically receive all group messages.