Re: #customboard #defconfig #supervisormode #defconfig #customboard #supervisormode


Boie, Andrew P
 

We are talking past each other. What is your definition of "user mode"? I don't think we are using the same terminology. I don't know what you mean by "machine mode". You can't have the entire kernel run in user mode, you wouldn't be able to lock IRQs or do lots of other things.

The MMU is not enabled at all in the Risc-V port.

My feeling here is that no action needs to be taken.

 

Andrew

 

From: Sathya Narayanan N [mailto:sathya281@...]
Sent: Wednesday, October 17, 2018 9:32 PM
To: Boie, Andrew P <andrew.p.boie@...>
Cc: Mani Sadhasivam <manivannanece23@...>; users@...
Subject: Re: [Zephyr-users] #customboard #defconfig #supervisormode

 

Thanks. Actually I want to remove any supervisor mode access in the code. We don't want to have mmu. We want to run in user/machine mode.

I got your point on usermode. Is there a way I can turn off mmu/ supervisor mode. And run in machine mode.

The riscv32 hardware, we are running doesn't support mmu or supervisor mode. We want to run zephyr on it. I am looking for some flag kind of thing, that can turn off mmu/supervisor mode.

Please suggest.

On Thursday, October 18, 2018, Boie, Andrew P <andrew.p.boie@...> wrote:
> Hi,
>
>  
>
> User mode is currently only supported on x86, ARM, and ARC CPUs.
>
> The documentation uses "supervisor mode" to refer to non-user mode, i.e. all CPU instructions may be executed and all memory may be touched.
>
> It seems to be the case that this collides with some RISC-V specific term?
>
>  
>
> More information: https://docs.zephyrproject.org/latest/kernel/usermode/usermode.html
>
>  
>
> HTH,
>
> Andrew
>
>  
>
> From: users@... [mailto:users@...] On Behalf Of Mani Sadhasivam
> Sent: Wednesday, October 17, 2018 3:00 AM
> To: users@...
> Subject: Re: [Zephyr-users] #customboard #defconfig #supervisormode
>
>  
>
> Zephyr supports supervisor mode. I want to nullify it at software level.
>
> Where did you find this information? For RISC-V SoCs, the supervisor mode is only used
> when the base architecture has the 'S' extension. Since there is no Supervisor enabled
> SoCs supported by Zephyr so far, the core RISC-V code doesn't care about it.
>
> This applies to QEMU also.
>
> -Mani
>
--

 regards,
Sathya  


 

 

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