Re: Use different memory bank


Antoine Zen-Ruffinen
 

Thanks Arvid!


You solution worked! Thanks! But I had to modify it to work with my code base: 


#define ITCM_ADDR (DT_INST_0_NXP_IMX_ITCM_BASE_ADDRESS)
#define DTCM_ADDR (DT_INST_0_NXP_IMX_DTCM_BASE_ADDRESS)

I dont know why I had to use a different symbol name than you. Maybe because of Zehpyr version, we use currently 2.2.


Best regards,


Antoine


From: Arvid Rosén <arvid@...>
Sent: Monday, June 8, 2020 4:27:56 PM
To: Antoine Zen-Ruffinen; Henrik Brix Andersen
Cc: users@...
Subject: Re: [Zephyr-users] Use different memory bank
 

Hi Antoine,

 

We use CODE_DATA_RELOCATION on i.MX RT 1020. It is a bit of a hack though, but I added this to the dts_fixup.h for our board:

 

// Needed for CODE and DATA relocation

#define ITCM_ADDR (DT_N_S_soc_S_flexram_400b0000_S_itcm_0_REG_IDX_0_VAL_ADDRESS)

#define DTCM_ADDR (DT_N_S_soc_S_flexram_400b0000_S_dtcm_20000000_REG_IDX_0_VAL_ADDRESS)

#define OCRAM_ADDR (DT_N_S_soc_S_flexram_400b0000_S_ocram_20200000_REG_IDX_0_VAL_ADDRESS)

 

Obviously, this isn’t a good solution, but it does work for us at least.

 

It would be great with some input on howto solve this for real.

 

Best Regards,

Arvid

 

 

From: <users@...> on behalf of "Antoine Zen-Ruffinen via lists.zephyrproject.org" <antoine=riedonetworks.com@...>
Reply to: "antoine@..." <antoine@...>
Date: Monday, 8 June 2020 at 16:04
To: Henrik Brix Andersen <henrik@...>
Cc: "users@..." <users@...>
Subject: Re: [Zephyr-users] Use different memory bank

 

HI Brix,

 

Yes, I've tried that.  See in my first post:
 

> - How to specify that code should be relocated to ITCM while using CODE_DATA_RELOCATION ? I have tried "zephyr_code_relocate(ram_func.c ITCM)" but with no success.

 

As said, I was able to move come code to the SRAM but not to another RAM bank. Also I'm not sure that the BSP for the i.MXRT is doing it right. There is a few more memory region defined in the linker script in "soc/arm/nxp_imx/rt/linker.ld" and I think it is that that is printed at the end of the compilation. I think the related section are missing in the linker file. I don't know if the build system is expected to generate them from "zephyr_code_relocate() " and place them in the right memory region or if I need to do something extra. Also I like to have the code in ITCM memory (RAM) and data to DTCM memory from the same source file.


From: Henrik Brix Andersen <henrik@...>
Sent: Sunday, June 7, 2020 11:09:01 AM
To: Antoine Zen-Ruffinen
Cc: users@...
Subject: Re: [Zephyr-users] Use different memory bank

 

Hi Antoine,

Have you seen the instructions for code and data relocation in the Zephyr documentation?
https://docs.zephyrproject.org/latest/guides/code-relocation.html

Brix
-- 
Henrik Brix Andersen

> On 4 Jun 2020, at 17.32, Antoine Zen-Ruffinen <antoine@...> wrote:
>
> Hi,
>
> I have trouble getting full usage of the RAM on my SoC using zephyr and I might need a little help as I have not found the needed information in the doc. Here's the situation:
>
> I'm using Zephyr on the iMXRT1062 platform which is an Cortex-M7 with 3 separate non-contigus memory banks, from the datasheet (I's a little more complicated than that, but here I simplify):
>
> ITCM (Instruction Tight Coupled Memory) @ 0x0000'0000, size 128K
> DTCM (Data Tight Coupled Memory) @ 0x2000'0000, size 128K
> OCRAM (General RAM, slower) @ 0x2020'0000, size 768 K
>
> This setup is clearly defined in the .dts and the linker script in `zephyr/soc/arm/nxp_imx/rt/linker.ld`. When compiling an image, I get this same setup printed form the build system too (OCRAM is renamed SRAM by the build system, don't know why):
>
> ....
> [7/12] Linking C executable zephyr/zephyr_prebuilt.elf
> Memory region         Used Size  Region Size  %age Used
>             DTCM:          0 GB       128 KB      0.00%
>             ITCM:          0 GB       128 KB      0.00%
>            FLASH:      276524 B        16 MB      1.65%
>             SRAM:      114196 B       768 KB     14.52%
>         IDT_LIST:         344 B         2 KB     16.80%
> [12/12] Linking C executable zephyr/zephyr.elf
>
> As you can see all is placed in SRAM section. I can change and have everything linked to DTCM using KConfig option "CONFIG_DATA_DTCM", but then it's EVERTHING there . I've discovered that there is a macro `__dtcm_data_section` defined in `zephyr/include/linker/section_tags.h` that I thought it will place the variable in DTCM, but if I use it, I got the following error from the linker:
>
> /home/antoine/tools/SDKs/zephyr-sdk-0.11.1/arm-zephyr-eabi/bin/../lib/gcc/arm-zephyr-eabi/9.2.0/../../../../arm-zephyr-eabi/bin/ld: warning: orphan section `.dtcm_data' from `app/libapp.a(com_uart.c.obj)' being placed in section `.dtcm_data'
>
> My questions:
>
>  - How to use different non-contigus  memory region with Zephyr ?
>  - How can I specify what data should be placed on witch RAM bank ?
>  - How to specify that code should be relocated to ITCM while using CODE_DATA_RELOCATION ? I have tried "zephyr_code_relocate(ram_func.c ITCM)" but with no success.
>  - Can I place, for instance, all kernel code into ITCM with similar mechanism as "zephyr_code_relocate()" (ITCM  is faster than flash as the flash is external on this SoC)?
>
>
>
> Antoine Zen-Ruffinen
>
> Riedo Networks Ltd
> Route de la Fonderie 6, 1700 Fribourg, Switzerland
> Tel: +41 26 505 50 03, Fax: +41 26 505 50 01 www.riedonetworks.com
>

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