Re: STM32F107 clocks
Gunnar Bråding
Ahhh... Thanks! Then I don’t need to feel too stupid for not understanding it. 😀
toggle quoted messageShow quoted text
Cheers, -- Gunnar
On 15 Apr 2021, at 15:29, Erwan Gouriou <erwan.gouriou@...> wrote:
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Re: STM32F107 clocks
Erwan Gouriou
Hi Gunnar, Unfortunately, we miss code for PLL2 configuration as PLL input. Though, I'm adding Attie who investigated that point and may have code to get it working. BR Erwan
On Thu, 15 Apr 2021 at 10:51, Gunnar Bråding <gunnar@...> wrote: Hi!
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STM32F107 clocks
Gunnar Bråding
Hi!
I got a board with the crystal at 25MHz, and need to use the PLL2 as input to the system clock. I just do not seem to understand the code enough to see how to set the prediv and multiplication for the PLL2 I can choose PLL2 as input to the PLL, and PLL as input to the system clock, but how do set the parameters for PLL2? Any pointers would be very much appreciated. Cheers, — Gunnar
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CFP Reminder -- Zephyr Developer Summit 2021
Members of the Zephyr Community, A reminder of the Call for Papers that remains open until Tuesday, April 20: This free virtual event will feature two tracks: Track A: Mini-conference (each will be 120 minutes in length)
Track B: Presentations. (choice of 30 or 60 minutes in length or lighting talks)
Other Key Dates
Thank you! Brett
On Wed, Apr 7, 2021 at 4:16 PM Brett Preston <bpreston@...> wrote:
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Bluetooth support for Silicon Labs EFR32XX
chzfmx@163.com <chzfmx@...>
Hi ,
My zephyr version is 2.5.0, and the board is EFR32_radio_brd4180a from Silicon Labs. When I try to compile and run the Bluetooth routine (samples/blutooth/peripheral_hr), the serial port prints: "Bluetooth init failed (err -19) , No HCI driver regsitered", and then I retrieved Issues#17005: https://github.com/zephyrproject-rtos/zephyr/issues/17005 . The conclusion is that it is almost difficult to provide Bluetooth support for Silicon Labs chips unless they provide library or register descriptions, so I would like to ask if there are any new developments or plans for the future.Thanks! chzfmx@...
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brushless motor / servo driver in zephyr ?
popeye22202
Is there any brushless motor / servo drivers in zephyr ?
FYI, I've noticed various brushless software, such as : http://vesc-project.com : ChibiOS based. Mostly motor code (originally for skateboards), but added "VESCular6" servo code recently. https://github.com/mjbots/moteus . mbed-os based. Mostly servo / actuator code for robots, but he added motor code recently. http://simplefoc.com : Arduino based. I've been tinkering w/ a stm32 eval kit : P-NUCLEO-IHM001 with the ST motor sdk, but I'd like to use Zephyr. Thanks !
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Cap Able
Hello.
Are there any more specifics than provided in https://docs.zephyrproject.org/latest/guides/portability/index.html to be able use the CMSIS RTOS v2 (or V1) in Zephyr OS? When enabled does it disable/replace the Zephyr OS kernel? Also, is my understanding correct that the CMSIS would have to be treated as a Module (external project)? That this is ARM specific only? Is there a reference implementation that shows how the KConfig/yaml/CMakefiles are setup?
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Raúl Sánchez Siles
Hello: I remembered that Anas Nashif wrote a post about this subject: https://www.planux.com/index.php/2018/08/21/tracing-zephyr-applications-with-segger-systemview/ HTH, Regards,
El domingo, 4 de abril de 2021 3:15:14 (CEST) carlos.rodriguez via lists.zephyrproject.org escribió:
Hello:
I was wondering if the community could help me with using SystemView with Zephyr.
When I connect to the board using JLink and then try to record with Systemview, I get a message telling me that the RTT control block was not detected. If I force the call to SEGGER_SYSVIEW_Start() by either setting CONFIG_SEGGER_SYSTEMVIEW_BOOT_ENABLE=y or by putting it in my main function, what I get instead is a message to the effect that it can't find the SystemView buffer.
I believe I've been following the instructions correctly as outlined here:
https://docs.zephyrproject.org/2.4.0/guides/debugging/probes.html?highlight=segger.
and here
https://docs.zephyrproject.org/1.9.0/samples/subsys/debug/sysview/README.html
I am using Zephyr 2.4.9 with the 0.11.4 SDK on Ubuntu 20.4.
For the image, I am using the hello_world example and adding the following to the prj.conf file:
CONFIG_TRACING=y CONFIG_SEGGER_SYSTEMVIEW=y CONFIG_THREAD_NAME=y CONFIG_USE_SEGGER_RTT=y CONFIG_SEGGER_SYSTEMVIEW_BOOT_ENABLE=y CONFIG_STDOUT_CONSOLE=y
It's interesting to note that JLink itself appears to connect just fine:
Connecting to target via SWD Found SW-DP with ID 0x4BA01477 STM32 (Protection Detection): Unexpected IDCODE DEV_ID 0x 461 found. Only checking the 1st flash bank for write protection. Found SW-DP with ID 0x4BA01477 DPv0 detected Scanning AP map to find all available APs AP[1]: Stopped AP scan as end of AP map has been reached AP[0]: AHB-AP (IDR: 0x24770011) Iterating through AP map to find AHB-AP to use AP[0]: Core found AP[0]: AHB-AP ROM base: 0xE00FF000 CPUID register: 0x410FC241. Implementer code: 0x41 (ARM) Found Cortex-M4 r0p1, Little endian. FPUnit: 6 code (BP) slots and 2 literal slots CoreSight components: ROMTbl[0] @ E00FF000 ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7 ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 003BB002 DWT ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 002BB003 FPB ROMTbl[0][3]: E0000000, CID: B105E00D, PID: 003BB001 ITM ROMTbl[0][4]: E0040000, CID: B105900D, PID: 000BB9A1 TPIU ROMTbl[0][5]: E0041000, CID: B105900D, PID: 000BB925 ETM Cortex-M4 identified. J-Link>
I am working on a Nucleo-L496ZG board, but the same thing happens on a Nucleo-F429Zi or a Nucleo-L4R5zi. I am following the SEGGER instructions to flash the onboard ST-Links with JLink firmware, which appears to work fine.
Any help will be appreciated.
Best regards:
-Carlos Rodriguez.
-- Raúl Sánchez Siles SW Engineer K-LAGAN EID
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Network forum agenda
Jukka Rissanen
Hi all,
There is a network forum meeting tomorrow Tue 6 Apr at 8AM PST / 17.00 CET. Currently the agenda has one item: * Network traffic monitoring (demo) If there are any other network related topics you want to discuss, please let me know. Live Agenda/Minutes: https://docs.google.com/document/d/1qFsOpvbyLzhflJbbv4Vl__497pKHDoUCy9hjAveyCX0/edit?usp=sharing Shared Folder: https://drive.google.com/drive/folders/1j6d0FLeOjiMil1Ellb59AsfHdzuWdAAc?usp=sharing ___________________________________________________________ Join Microsoft Teams Meeting ( https://teams.microsoft.com/l/meetup-join/19%3ameeting_NDU5ODRkNzktZDBmNC00MDg5LWI2OWEtNzM0MGZjMDU0Yjgw%40thread.v2/0?context=%7b%22Tid%22%3a%22af0096d9-700c-411a-b795-b3dd7122bad2%22%2c%22Oid%22%3a%22841a7c92-7816-4faf-9887-5e334e88f6d8%22%7d ) +1 321-558-6518 ( tel:+1 321-558-6518,,458216365# ) United States, Orlando (Toll) Conference ID: 458 216 365# Local numbers ( https://dialin.teams.microsoft.com/325d775d-c910-441e-90d0-353ebaa56cdd?id=458216365 ) | Reset PIN ( https://mysettings.lync.com/pstnconferencing ) | Learn more about Teams ( https://aka.ms/JoinTeamsMeeting ) | Meeting options ( https://teams.microsoft.com/meetingOptions/?organizerId=841a7c92-7816-4faf-9887-5e334e88f6d8&tenantId=af0096d9-700c-411a-b795-b3dd7122bad2&threadId=19_meeting_NDU5ODRkNzktZDBmNC00MDg5LWI2OWEtNzM0MGZjMDU0Yjgw@thread.v2&messageId=0&language=en-US ) Cheers, Jukka
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carlos.rodriguez@...
Hello:
I was wondering if the community could help me with using SystemView with Zephyr.
When I connect to the board using JLink and then try to record with Systemview, I get a message telling me that the RTT control block was not detected. If I force the call to SEGGER_SYSVIEW_Start() by either setting CONFIG_SEGGER_SYSTEMVIEW_BOOT_ENABLE=y or by putting it in my main function, what I get instead is a message to the effect that it can't find the SystemView buffer.
I believe I've been following the instructions correctly as outlined here:
https://docs.zephyrproject.org/2.4.0/guides/debugging/probes.html?highlight=segger.
and here
https://docs.zephyrproject.org/1.9.0/samples/subsys/debug/sysview/README.html
I am using Zephyr 2.4.9 with the 0.11.4 SDK on Ubuntu 20.4.
For the image, I am using the hello_world example and adding the following to the prj.conf file:
CONFIG_TRACING=y
CONFIG_SEGGER_SYSTEMVIEW=y
CONFIG_THREAD_NAME=y
CONFIG_USE_SEGGER_RTT=y
CONFIG_SEGGER_SYSTEMVIEW_BOOT_ENABLE=y
CONFIG_STDOUT_CONSOLE=y
It's interesting to note that JLink itself appears to connect just fine:
Connecting to target via SWD
Found SW-DP with ID 0x4BA01477
STM32 (Protection Detection): Unexpected IDCODE DEV_ID 0x 461 found. Only checking the 1st flash bank for write protection.
Found SW-DP with ID 0x4BA01477
DPv0 detected
Scanning AP map to find all available APs
AP[1]: Stopped AP scan as end of AP map has been reached
AP[0]: AHB-AP (IDR: 0x24770011)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FF000
CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
Found Cortex-M4 r0p1, Little endian.
FPUnit: 6 code (BP) slots and 2 literal slots
CoreSight components:
ROMTbl[0] @ E00FF000
ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7
ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 003BB002 DWT
ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 002BB003 FPB
ROMTbl[0][3]: E0000000, CID: B105E00D, PID: 003BB001 ITM
ROMTbl[0][4]: E0040000, CID: B105900D, PID: 000BB9A1 TPIU
ROMTbl[0][5]: E0041000, CID: B105900D, PID: 000BB925 ETM
Cortex-M4 identified.
J-Link>
I am working on a Nucleo-L496ZG board, but the same thing happens on a Nucleo-F429Zi or a Nucleo-L4R5zi. I am following the SEGGER instructions to flash the onboard ST-Links with JLink firmware, which appears to work fine.
Any help will be appreciated.
Best regards:
-Carlos Rodriguez.
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Re: custom board
#customboard
#dts
Bolivar, Marti
Hi there,
The error message may have gotten lost in the rest of the output, but it describes what went wrong, a stack trace where it went wrong, and how to fix it: "wbasser via lists.zephyrproject.org" <wbasser=gmail.com@...> writes: CMake Error at C:/zephyrproject/zephyr/boards/common/openocd-nrf5.board.cmake:13 (message):Did you try setting the variable mentioned in the error in your board.cmake before including openocd-nrf5.board.cmake?
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Re: custom board
#customboard
#dts
The Kconfig.defconfig doesn’t look right
config BOARD default "fuse board"
I think it should be “fuseboard” or maybe “fuse_board” but I didn’t test it. I looked at every other board name in the zephyr tree and none have a space in the default.
Lawrence King Principal Developer +1(416)627-7302
From: users@... <users@...>
On Behalf Of wbasser@...
Sent: Wednesday, March 31, 2021 1:21 PM To: users@... Subject: [Zephyr-users] custom board #customboard #dts
Created a custom board file, based on the DTS for a sample board. Changed the name of the file, and the references to the new board. Attempting to build, I received this error. C:\zephyrproject\zephyr>west build -p auto -b fuseboard c:/temp/fusetest -- west build: making build dir C:\zephyrproject\zephyr\build pristine -- west build: generating a build system Including boilerplate (Zephyr base): C:/zephyrproject/zephyr/cmake/app/boilerplate.cmake -- Application: C:/Temp/FuseTest -- Zephyr version: 2.5.99 (C:/zephyrproject/zephyr) -- Found Python3: C:/Python39/python.exe (found suitable exact version "3.9.2") found components: Interpreter -- Found west (found suitable version "0.9.0", minimum required is "0.7.1") -- Board: fuseboard -- Cache files will be written to: C:/zephyrproject/zephyr/.cache -- Found toolchain: gnuarmemb (c:/gnuarmemb) -- Found BOARD.dts: C:/Temp/FuseTest/boards/arm/fuseboard/fuseboard.dts -- Generated zephyr.dts: C:/zephyrproject/zephyr/build/zephyr/zephyr.dts -- Generated devicetree_unfixed.h: C:/zephyrproject/zephyr/build/zephyr/include/generated/devicetree_unfixed.h -- Generated device_extern.h: C:/zephyrproject/zephyr/build/zephyr/include/generated/device_extern.h Parsing C:/zephyrproject/zephyr/Kconfig Loaded configuration 'C:/Temp/FuseTest/boards/arm/fuseboard/fuseboard_defconfig' Merged configuration 'C:/Temp/FuseTest/prj.conf' Configuration saved to 'C:/zephyrproject/zephyr/build/zephyr/.config' Kconfig header saved to 'C:/zephyrproject/zephyr/build/zephyr/include/generated/autoconf.h' -- The C compiler identification is GNU 10.2.1 -- The CXX compiler identification is GNU 10.2.1 -- The ASM compiler identification is GNU -- Found assembler: C:/gnuarmemb/bin/arm-none-eabi-gcc.exe CMake Error at C:/zephyrproject/zephyr/boards/common/openocd-nrf5.board.cmake:13 (message): Can't match nrf5 subfamily from BOARD name. To fix, set CMake variable OPENOCD_NRF5_SUBFAMILY. Call Stack (most recent call first): boards/arm/fuseboard/board.cmake:8 (include) C:/zephyrproject/zephyr/cmake/app/boilerplate.cmake:622 (include) C:/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:24 (include) C:/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:35 (include_boilerplate) CMakeLists.txt:10 (find_package)
-- Configuring incomplete, errors occurred! See also "C:/zephyrproject/zephyr/build/CMakeFiles/CMakeOutput.log". See also "C:/zephyrproject/zephyr/build/CMakeFiles/CMakeError.log". FATAL ERROR: command exited with status 1: 'C:\Program Files\CMake\bin\cmake.EXE' '-DWEST_PYTHON=c:\python39\python.exe' '-BC:\zephyrproject\zephyr\build' '-Sc:\temp\fusetest' -GNinja -DBOARD=fuseboard
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custom board
#customboard
#dts
wbasser@...
Created a custom board file, based on the DTS for a sample board. Changed the name of the file, and the references to the new board. Attempting to build, I received this error.
C:\zephyrproject\zephyr>west build -p auto -b fuseboard c:/temp/fusetest
-- west build: making build dir C:\zephyrproject\zephyr\build pristine
-- west build: generating a build system
Including boilerplate (Zephyr base): C:/zephyrproject/zephyr/cmake/app/boilerplate.cmake
-- Application: C:/Temp/FuseTest
-- Zephyr version: 2.5.99 (C:/zephyrproject/zephyr)
-- Found Python3: C:/Python39/python.exe (found suitable exact version "3.9.2") found components: Interpreter
-- Found west (found suitable version "0.9.0", minimum required is "0.7.1")
-- Board: fuseboard
-- Cache files will be written to: C:/zephyrproject/zephyr/.cache
-- Found toolchain: gnuarmemb (c:/gnuarmemb)
-- Found BOARD.dts: C:/Temp/FuseTest/boards/arm/fuseboard/fuseboard.dts
-- Generated zephyr.dts: C:/zephyrproject/zephyr/build/zephyr/zephyr.dts
-- Generated devicetree_unfixed.h: C:/zephyrproject/zephyr/build/zephyr/include/generated/devicetree_unfixed.h
-- Generated device_extern.h: C:/zephyrproject/zephyr/build/zephyr/include/generated/device_extern.h
Parsing C:/zephyrproject/zephyr/Kconfig
Loaded configuration 'C:/Temp/FuseTest/boards/arm/fuseboard/fuseboard_defconfig'
Merged configuration 'C:/Temp/FuseTest/prj.conf'
Configuration saved to 'C:/zephyrproject/zephyr/build/zephyr/.config'
Kconfig header saved to 'C:/zephyrproject/zephyr/build/zephyr/include/generated/autoconf.h'
-- The C compiler identification is GNU 10.2.1
-- The CXX compiler identification is GNU 10.2.1
-- The ASM compiler identification is GNU
-- Found assembler: C:/gnuarmemb/bin/arm-none-eabi-gcc.exe
CMake Error at C:/zephyrproject/zephyr/boards/common/openocd-nrf5.board.cmake:13 (message):
Can't match nrf5 subfamily from BOARD name. To fix, set CMake variable
OPENOCD_NRF5_SUBFAMILY.
Call Stack (most recent call first):
boards/arm/fuseboard/board.cmake:8 (include)
C:/zephyrproject/zephyr/cmake/app/boilerplate.cmake:622 (include)
C:/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:24 (include)
C:/zephyrproject/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:35 (include_boilerplate)
CMakeLists.txt:10 (find_package)
-- Configuring incomplete, errors occurred!
See also "C:/zephyrproject/zephyr/build/CMakeFiles/CMakeOutput.log".
See also "C:/zephyrproject/zephyr/build/CMakeFiles/CMakeError.log".
FATAL ERROR: command exited with status 1: 'C:\Program Files\CMake\bin\cmake.EXE' '-DWEST_PYTHON=c:\python39\python.exe' '-BC:\zephyrproject\zephyr\build' '-Sc:\temp\fusetest' -GNinja -DBOARD=fuseboard I have had a successful attempt at this with a different family of processors with no problem. I have attached the project files for reference. Any help would be appreciated.
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Advertising/Scan ISO ticker nodes
#ble
Carl Stehle
Hello,
When using CONFIG_BT_CTLR_ADV_ISO or CONFIG_BT_CTLR_SYNC_ISO, is it necessary to define ticker nodes in subsys/bluetooth/controller/ll_sw/ull.c: #if defined(CONFIG_BT_CTLR_ADV_ISO) #define BT_ADV_ISO_TICKER_NODES ((TICKER_ID_ADV_ISO_LAST) - \ (TICKER_ID_ADV_ISO_BASE) + 1) #else #define BT_ADV_ISO_TICKER_NODES 0 #endif #if defined(CONFIG_BT_CTLR_SYNC_ISO) #define BT_SCAN_SYNC_ISO_TICKER_NODES ((TICKER_ID_SCAN_SYNC_ISO_LAST) - \ (TICKER_ID_SCAN_SYNC_ISO_BASE) + 1) #else #define BT_SCAN_SYNC_ISO_TICKER_NODES 0 #endif and add them to the definition: #define TICKER_NODES (TICKER_ID_ULL_BASE + \ BT_ADV_TICKER_NODES + \ BT_ADV_AUX_TICKER_NODES + \ BT_ADV_SYNC_TICKER_NODES + \ BT_ADV_ISO_TICKER_NODES + \ BT_SCAN_TICKER_NODES + \ BT_SCAN_AUX_TICKER_NODES + \ BT_SCAN_SYNC_TICKER_NODES + \ BT_SCAN_SYNC_ISO_TICKER_NODES + \ BT_CONN_TICKER_NODES + \ BT_CIG_TICKER_NODES + \ USER_TICKER_NODES + \ FLASH_TICKER_NODES) Thank you, Carl
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Re: UART API Blocking TX
Tavish Naruka
Hi Jieng, Tavish
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Re: Using SPI Port Question - Fanstel BT840
Jeremy Herbert
Hi Mike, I am not an expert on Zephyr, in fact I am roughly in the same position as you. But I have recently solved this problem so I thought I should share. I apologise in advance if some of this is obvious to you already. The ADXL372 example will not be useful to you, because Zephyr already has a driver for that specific device. This abstracts away the direct bus access. The first thing you need to do is ensure that the SPI peripheral is mapped to the correct pins. You can do this in the dts file for the board, or using a dts overlay. Something like this is what I would normally use for the nrf52840: &spi1 { compatible = "nordic,nrf-spi"; status = "okay"; sck-pin = <14>; mosi-pin = <13>; miso-pin = <15>; cs-gpios = <&gpio0 26 GPIO_ACTIVE_LOW>; clock-frequency = <1000000>; }; Next, take a look at this example code: https://github.com/zephyrproject-rtos/zephyr/blob/master/samples/drivers/spi_fujitsu_fram/src/main.c There is no driver for this FRAM device, so the example does indeed use the bare API to control the SPI bus. The main use of the raw SPI API is in the function mb85rs64v_access. Note that the Zephyr APIs use a structure-in-structure approach, where you pass a spi_buf_set which contains one or more spi_buf. If you cross-reference that code with the documentation here: https://docs.zephyrproject.org/latest/reference/peripherals/spi.html it should make more sense. Hope this helps. Thanks, Jeremy
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Using SPI Port Question - Fanstel BT840
Greetings,
I wonder if this is the correct place to seek help with a problem I am seeing. I am trying to use the SPI port on a Fanstel BT840, and was hoping to use the spi_read() and spi_write() functions that are found in the header file spi.h in the directory zephyr/include/drivers/. These functions would be used to pass data between the Bluetooth and SPI ports on the Fanstel BT840. The Fanstel part has the Nordic nRF82540 as its core processor.
In my project’s main.c, I include <drivers/spi.h>. I am then able to add ‘status = spi_read(spiDev, &spiConfig, &spi_rx);’, but run into exception errors when I try to step over this function. A Nordic FAE suggested that I might be taking a wrong approach, and should instead seek out examples that make use of the SPI port. Looking through the adxl372 example he suggested, it is not obvious how to read and write from the SPI port.
Zephyr is a new and very broad field to me, so I would appreciate any pointers to get going in the right direction.
Thanks,
Mike Marks Utility Relay Company.
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UART API Blocking TX
Hi,
I'm using Zephyr's UART API and especially the uart_tx() function. However, the function being non-blocking is giving me troubles. Does any one know how to make it blocking or any method to make sure uart_tx() is done sending before the program proceeds? Thank you, jleng
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Analog Microphone sensortile box
Dimitrios Kosyvas <kosyvas14828@...>
Hello I am trying to get some samples from the MP23ABS1 (analog sound sensor) in the STM32L4R9ZI chip . I am using the ADC zephyr driver to try and interact with the microphone but i am not reading anything .Is there any working example on how to use the adc zephyr driver on a stm32 board ? Dimitris Kosyvas
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Flash Circular Buffer on external spi flash
antoker@...
Hello Is it possible to use FCB on external spi flash? I see that FCB functions do not really contain any references to a flash device so I'm not sure if it can only be used against internal flash? -a
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