I'm in the process of adding device firmware upgrade support for the mimxrt1050_evk using the hyperflash.
To use the
flash_img api I had to make the following change:
--- a/dts/bindings/mtd/nxp,imx-flexspi-hyperflash.yaml
+++ b/dts/bindings/mtd/nxp,imx-flexspi-hyperflash.yaml
@@ -5,4 +5,4 @@ description: NXP FlexSPI HyperFlash
compatible: "nxp,imx-flexspi-hyperflash"
-include: nxp,imx-flexspi-device.yaml
+include: ["nxp,imx-flexspi-device.yaml", soc-nv-flash.yaml]
Now with the flash shell enabled when I do an erase, write, and then read, I don't read back exactly what is written:
> flash erase S26KS512S 340000
Erase success.
> flash read S26KS512S 340000 8
00340000: ff ff ff ff ff ff ff ff |........ |
> flash write S26KS512S 340000 0123 4567
Write OK.
Verification ERROR!
> flash read S26KS512S 340000 8
00340000: 01 00 00 00 01 40 00 00 |.....@.. |
So it appears that flash was actually written, but more bits are set to 0 then expected. It must be on the write side because the device is booting from the hyperflash without issue. Is there a reason that the soc-nv-flash binding wasn't included for the hyperflash in the first place (something that isn't compatible that I'm unaware of)? I've noticed that changing the ahb-write-wait-interval property for the hyperflash in the board's device tree seems to have an effect on the result. Any insight anyone has would be greatly appreciated.
Thanks!
